NCP4308
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17
If no R
SHIFT_CS
resistor is used, the turn-on, turn-off and
V
TH_CS_RESET
thresholds are fully given by the CS input
specification (please refer to electrical characteristics table).
The CS pin offset current causes a voltage drop that is equal
to:
V
RSHIFT_CS
+ R
SHIFT_CS
*I
CS
(eq. 1)
Final turn−on and turn off thresholds can be then calculated
as:
V
CS_TURN_ON
+ V
TH_CS_ON
*
ǒ
R
SHIFT_CS
*I
CS
Ǔ
(eq. 2)
V
CS_TURN_OFF
+ V
TH_CS_OFF
*
ǒ
R
SHIFT_CS
*I
CS
Ǔ
(eq. 3)
V
CS_RESET
+ V
TH_CS_RESET
*
ǒ
R
SHIFT_CS
*I
CS
Ǔ
(eq. 4)
Note that R
SHIFT_CS
impact on turn-on and V
TH_CS_RESET
thresholds is less critical than its effect on the turn−off
threshold.
It should be noted that when using a SR MOSFET in a
through hole package the parasitic inductance of the
MOSFET package leads (refer to Figure 39) causes a
turn−off current threshold increase. The current that flows
through the SR MOSFET experiences a high Di(t)/Dt that
induces an error voltage on the SR MOSFET leads due to
their parasitic inductance. This error voltage is proportional
to the derivative of the SR MOSFET current; and shifts the
CS input voltage to zero when significant current still flows
through the MOSFET channel. As a result, the SR MOSFET
is turned−off prematurely and the efficiency of the SMPS is
not optimized − refer to Figure 40 for a better understanding.
Figure 39. SR System Connection Including MOSFET and Layout Parasitic Inductances in LLC Application