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ISL43L711IU-T

P1-P3P4-P6P7-P9P10-P11
4
FN6092.3
May 29, 2008
POWER SUPPLY CHARACTERISTICS
Power Supply Range Full 1.65 - 3.6 V
Positive Supply Current, I+ V+ = 1.65V to 3.6V, V
IN
= 0V or V+, all channels on
or off
25 - - 30 nA
Full - - 750 nA
DIGITAL INPUT CHARACTERISTICS
Input Voltage Low, V
INL
Full - - 0.5 V
Input Voltage High, V
INH
Full 1.4 - - V
Input Current, I
INH
, I
INL
V+ = 3.3V, V
IN
= 0V or V+ (Note 10) Full -0.5 - 0.5 A
NOTES:
7. V
IN
= input voltage to perform proper function.
8. The algebraic convention, whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
9. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested.
10. Limits established by characterization and are not production tested.
11. R
ON
matching between channels is calculated by subtracting the channel with the highest max Ron value from the channel with lowest max Ron
value.
12. Flatness is defined as the difference between maximum and minimum value of on-resistance over the specified analog signal range.
Electrical Specifications - 1.8V Supply Test Conditions: V+ = +1.65V to +2.0V, GND = 0V, V
INH
= 1.0V, V
INL
= 0.4V (Note 7),
Unless Otherwise Specified
PARAMETER TEST CONDITIONS
TEMP
(°C)
MIN
(Notes 8, 9) TYP
MAX
(Notes 8, 9) UNITS
ANALOG SWITCH CHARACTERISTICS
Analog Signal Range, V
ANALOG
Full 0 - V+ V
ON Resistance, R
ON
V+ = 1.8V, I
COM
= 100mA, V
NO
or V
NC
= 0V to V+,
(See Figure 4, Note 10)
25 - 0.26 0.35
Full - - 0.4
R
ON
Matching Between Channels,
R
ON
V+ = 1.8V, I
COM
= 100mA, V
NO
or V
NC
= Voltage at
Max R
ON
, (Note 11)
25 - 0.005 -
Full - 0.005 -
R
ON
Flatness, R
FLAT(ON)
V+ = 1.8V, I
COM
= 100mA, V
NO
or V
NC
= 0V to V+,
(Note 12)
25 - 0.074 -
Full - 0.082 -
NO or NC OFF Leakage Current,
I
NO(OFF)
or I
NC(OFF)
V+ = 2.0V, V
COM
= 0.3V, 1.8V, V
NO
or V
NC
= 1.8V,
0.3V
25 -3 - 3 nA
Full -60 - 60 nA
COM ON Leakage Current,
I
COM(ON)
V = 2.0V, V
COM
= 0.3V, 1.8V, or V
NO
or V
NC
= 0.3V,
1.8V
25 -3 - 3 nA
Full -80 - 80 nA
DYNAMIC CHARACTERISTICS
Turn-ON Time, t
ON
V = 1.65V, V
NO
or V
NC
= 1.0V, R
L
= 50, C
L
=
35pF, V
IN
= 0 to 1.65V, (See Figure 1, Note 10)
25 - 30 40 ns
Full - - 45 ns
Turn-OFF Time, t
OFF
V = 1.65V, V
NO
or V
NC
= 1.0V, R
L
= 50, C
L
=
35pF, V
IN
= 0 to 1.65V, (See Figure 1, Note 10)
25 - 25 35 ns
Full - - 40 ns
Charge Injection, Q C
L
= 1.0nF, V
G
= 0V, R
G
= 0See Figure 2) 25 - -80 - pC
OFF Isolation R
L
= 50, C
L
= 5pF, f = 100kHz, V
COM
= 1 V
RMS,
(See Figure 3 and Figure 5)
25 - 62 - dB
Crosstalk (Channel-to-Channel) 25 - -94 - dB
Electrical Specifications - 3V Supply Test Conditions: V+ = +2.7V to +3.3V, GND = 0V, V
INH
= 1.4V, V
INL
= 0.5V (Note 7),
Unless Otherwise Specified (Continued)
PARAMETER TEST CONDITIONS
TEMP
(°C)
MIN
(Notes 8, 9) TYP
MAX
(Notes 8, 9) UNITS
ISL43L710, ISL43L711, ISL43L712
5
FN6092.3
May 29, 2008
NO or NC OFF Capacitance, C
OFF
f = 1MHz, V
NO
or V
NC
= V
COM
= 0V, (See Figure 6) 25 - 182 - pF
COM OFF Capacitance,
C
COM(OFF)
f = 1MHz, V
NO
or V
NC
= V
COM
= 0V, (See Figure 6) 25 - 182 - pF
COM ON Capacitance, C
COM(ON)
f = 1MHz, V
NO
or V
NC
= V
COM
= 0V, (See Figure 6) 25 - 290 - pF
POWER SUPPLY CHARACTERISTICS
Positive Supply Current, I+ V+ = 1.65V to 3.6V, V
IN
= 0V or V+, all channels on
or off
25 - - 30 nA
Full - - 750 nA
DIGITAL INPUT CHARACTERISTICS
Input Voltage Low, V
INL
Full - - 0.4 V
Input Voltage High, V
INH
Full 1.0 - - V
Input Current, I
INH
, I
INL
V+ = 2.0V, V
IN
= 0V or V+ (Note 10) Full -0.5 - 0.5 A
Test Circuits and Waveforms
Logic input waveform is inverted for switches that have the opposite
logic sense.
FIGURE 1A. MEASUREMENT POINTS
Repeat test for all switches. C
L
includes fixture and stray
capacitance.
FIGURE 1B. TEST CIRCUIT
FIGURE 1. SWITCHING TIMES
FIGURE 2A. MEASUREMENT POINTS FIGURE 2B. TEST CIRCUIT
FIGURE 2. CHARGE INJECTION
Electrical Specifications - 1.8V Supply Test Conditions: V+ = +1.65V to +2.0V, GND = 0V, V
INH
= 1.0V, V
INL
= 0.4V (Note 7),
Unless Otherwise Specified (Continued)
PARAMETER TEST CONDITIONS
TEMP
(°C)
MIN
(Notes 8, 9) TYP
MAX
(Notes 8, 9) UNITS
50%
t
r
< 5ns
t
f
< 5ns
t
OFF
90%
V+
0V
V
NO
0V
t
ON
LOGIC
INPUT
SWITCH
INPUT
SWITCH
OUTPUT
90%
V
OUT
V
OUT
V
(NO or NC)
R
L
R
L
R
ON
+
------------------------------
=
SWITCH
INPUT
LOGIC
INPUT
V
OUT
R
L
C
L
COM
NO or NC
IN
50
35pF
GND
V+
C
V
OUT
V
OUT
ON
OFF
ON
Q = V
OUT
x C
L
SWITCH
OUTPUT
LOGIC
INPUT
V+
0V
C
L
V
OUT
R
G
V
G
GND
COM
NO or NC
V+
C
LOGIC
INPUT
IN
ISL43L710, ISL43L711, ISL43L712
6
FN6092.3
May 29, 2008
Detailed Description
The ISL43L71x family of devices are bidirectional, single
pole/single throw (SPST) analog switches that offer precise
switching capability from a single 1.65V to 3.6V supply with
low on-resistance (0.16) and high speed operation
(t
ON
= 13ns, t
OFF
= 13ns). The device is especially well
suited for portable battery powered equipment due to its low
operating supply voltage (1.65V), low power consumption
(2.7W max), low leakage currents (80nA max), and the tiny
TDFN and MSOP packaging. The ultra low on-resistance and
R
ON
flatness provide very low insertion loss and distortion to
application that require signal reproduction.
Supply Sequencing and Overvoltage Protection
With any CMOS device, proper power supply sequencing is
required to protect the device from excessive input currents
which might permanently damage the IC. All I/O pins contain
ESD protection diodes from the pin to V+ and to GND (See
Figure 7). To prevent forward biasing these diodes, V+ must
be applied before any input signals, and the input signal
voltages must remain between V+ and GND. If these
conditions cannot be guaranteed, then one of the following
two protection methods should be employed.
Logic inputs can easily be protected by adding a 1k
resistor in series with the input (See Figure 7). The resistor
limits the input current below the threshold that produces
permanent damage, and the sub-microamp input current
produces an insignificant voltage drop during normal
operation.
This method is not acceptable for the signal path inputs.
Adding a series resistor to the switch input defeats the
purpose of using a low R
ON
switch, so two small signal
diodes can be added in series with the supply pins to provide
overvoltage protection for all pins (See Figure 7). These
additional diodes limit the analog signal from 1V below V+ to
1V above GND. The low leakage current performance is
FIGURE 3. OFF ISOLATION TEST CIRCUIT FIGURE 4. R
ON
TEST CIRCUIT
FIGURE 5. CROSSTALK TEST CIRCUIT FIGURE 6. CAPACITANCE TEST CIRCUIT
Test Circuits and Waveforms (Continued)
ANALYZER
R
L
SIGNAL
GENERATOR
V+
C
0V or V+
NO or NC
COM
IN
X
GND
V+
C
0V or V+
NO or NC
COM
IN
GND
V
NX
V
1
R
ON
= V
1
/100mA
1mA
0V or V+
ANALYZER
V+
C
NO1 or NC1
SIGNAL
GENERATOR
R
L
GND
IN
1
COM1
IN
2
50
0V or V+
NC
COM2
NO2 or NC2
V+
C
GND
NO or NC
COM
IN
X
IMPEDANCE
ANALYZER
0V or V+
ISL43L710, ISL43L711, ISL43L712
P1-P3P4-P6P7-P9P10-P11

ISL43L711IU-T

Mfr. #:
Buy ISL43L711IU-T
Manufacturer:
Renesas / Intersil
Description:
IC SWITCH DUAL SPST 8MSOP
Lifecycle:
New from this manufacturer.
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