FEDL610Q409-05
ML610Q407/ML610Q408/ML610Q409
29/34
AC CHARACTERISTICS (Synchronous Serial Port)
(V
DD
= 1.25 to 3.6V, V
SS
= 0V, Ta = −20 to +70°C, Ta = −40 to +85°C for P version, unless otherwise specified)
Rating
Parameter Symbol Condition
Min. Typ. Max.
Unit
When RC oscillation is 500kHz
*
2
(V
DD
= 1.25 to 3.6V)
10 ⎯ ⎯
SCLKn input cycle
(slave mode)
t
SCYC
When RC oscillation is 2MHz
*
3
(V
DD
= 1.8 to 3.6V)
2 ⎯ ⎯
µs
SCLKn output cycle
(master mode)
t
SCYC
⎯ ⎯ SCLKn*
1
⎯ s
When RC oscillation is 500kHz
*
2
(V
DD
= 1.25 to 3.6V)
4 ⎯ ⎯
SCLKn input pulse width
(slave mode)
t
SW
When RC oscillation is 2MHz
*
3
(V
DD
= 1.8 to 3.6V)
04 ⎯ ⎯
µs
SCLKn output pulse width
(master mode)
t
SW
⎯
SCLKn*
1
×0.4
SCLKn*
1
×0.5
SCLKn*
1
×0.6
s
When RC oscillation is 500kHz
*
2
(V
DD
= 1.25 to 3.6V)
output load 10pF
⎯ ⎯ 500
SOUTn output delay time
(slave mode)
t
SD
When RC oscillation is 2MHz
*
3
(V
DD
= 1.8 to 3.6V)
output load 10pF
⎯ ⎯ 240
ns
When RC oscillation is 500kHz
*
2
(V
DD
= 1.25 to 3.6V)
output load 10pF
⎯ ⎯ 500
SOUTn output delay time
(master mode)
t
SD
When RC oscillation is 2MHz
*
3
(V
DD
= 1.8 to 3.6V)
output load 10pF
⎯ ⎯ 240
ns
SINn input setup time
(slave mode)
t
SS
⎯ 80 ⎯ ⎯ ns
When RC oscillation is 500kHz
*
2
(V
DD
= 1.25 to 3.6V)
500 ⎯ ⎯
SINn input setup time
(master mode)
t
SS
When RC oscillation is 2MHz
*
3
(V
DD
= 1.8 to 3.6V)
240 ⎯ ⎯
ns
When RC oscillation is 500kHz
*
2
(V
DD
= 1.25 to 3.6V)
300 ⎯ ⎯
SINn input hold time
t
SH
When RC oscillation is 2MHz
*
3
(V
DD
= 1.8 to 3.6V)
80 ⎯ ⎯
ns
n= 0,1
*1: Clock period selected with SnCK3–0 of the serial port n mode register (SIOnMOD1)
*
2
: When 500kHz RC oscillation is selected by OSCM2 of the frequency control register (FCON0)
*
3
: When 2MHz RC oscillation is selected by OSCM2 of the frequency control register (FCON0)
t
SD
SCLKn*
SINn*
SOUTn*
*: Indicates the secondary function of the port (n= 0,1)
t
SD
t
SS
t
SH
t
SW
t
SW
t
SCYC
