8
FN6167.2
February 20, 2008
Application Information
General Description
The EL5000A is a high performance 70V TFT-LCD row
driver. It level shifts TTL level timing signals from the video
source into 70V
P-P
output voltage. Its output is capable of
delivering 100mA peak current into 1nF of capacitive load. It
also incorporates logic to control the output timings. The
logic timing control circuit is powered from 3.3V supply.
Figure 15 shows the system block diagram.
Input Signals
The device performs beside of level transformation also logic
operation between the input signals:
• STV - Vertical Sync Timing signal, frequency range around
60Hz
• CPV - Horizontal Sync Timing signal, frequency range up
to 166kHz
• OE - Output Enable Write Signal, frequency range up to
166kHz
Output Signals
The output signals, CKV and CKVB are generated by
EL5000A internal switches. Figure 16 depicts the simplified
schematic of the output stage and interface.
C
L
capacitors model the capacitive loading appeared at the
inputs of the TFT-LCD panel for the CKV and the CKVB
signals. The C
L
is typically between 1nF and 5nF.
In addition to switches SW1, SW2, SW3, and SW4, a fifth
switch is added to reduce the power dissipation and shape
the output waveform. Figure 17 shows the location of the
additional SW5 switch.
In reality, each switch consists of two such switches, one for
the positive discharge and one for the negative discharge,
see Figure 18.
Due to the actual solid-state construction of the switches, the
capacitors C
L
does not get discharged entirely. The amount
of left over charges depends on the value of the voltages of
V
ON
and V
OFF
on the capacitors.
FIGURE 15. EL5000A SYSTEM BLOCK DIAGRAM
EL5000A
COLUMN DRIVER
HIGH VOLTAGE REGISTER
VIDEO SOURCE
STV
CPV
OE
CKV
STVP
CKVB
C
FIGURE 16. SIMPLIFIED SCHEMATIC OF OUTPUT STAGE
SW1 SW2
SW3 SW4
CL
r
CL
CKVB
CKV
r
CKVB
SW2SW1
SW3
CL
SW5
CKV
CL
r
SW4
Rd
FIGURE 17. BI-DIRECTIONAL SWITCHES
FIGURE 18. BI-DIRECTIONAL SWITCHES
SW5
D1
Rd1
Rd2
D2
SW5
CKVB
CKV
EL5000A
