ADG751ARTZ-REEL7

REV. –3
ADG751
SPECIFICATIONS
B Grade A Grade
–40C to –40C to
Parameter +25C +85C +25C +85C Units Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range 0 V to V
DD
0 V to V
DD
V
On-Resistance (R
ON
)60 35 typ V
S
= 0 V to V
DD
, I
DS
= –10 mA;
90 50 max Test Circuit 1
LEAKAGE CURRENTS V
DD
= +3.3 V
Source OFF Leakage I
S
(OFF) ±0.01 ±0.01 nA typ V
D
= 3 V/1 V, V
S
= 1 V/3 V;
±0.25 ±3.0 ±0.25 ±3.0 nA max Test Circuit 2
Drain OFF Leakage I
D
(OFF) ±0.01 ±0.01 nA typ V
D
= 1 V/3 V, V
S
= 3 V/1 V;
±0.25 ±3.0 ±0.25 ±3.0 nA max Test Circuit 2
Channel ON Leakage I
D
, I
S
(ON) ±0.01 ±0.01 nA typ V
D
= V
S
= 1 V, or 3 V;
±0.25 ±3.0 ±0.25 ±3.0 nA max Test Circuit 3
DIGITAL INPUTS
Input High Voltage, V
INH
2.0 2.0 V min
Input Low Voltage, V
INL
0.4 0.4 V max
Input Current
I
INL
or I
INH
0.001 0.001 µA typ V
IN
= V
INL
or V
INH
±0.5 ±0.5 µA max
C
IN
, Digital Input Capacitance 2 2 pF typ
DYNAMIC CHARACTERISTICS
1
t
ON
12 12 ns typ R
L
= 300 , C
L
= 35 pF;
19 19 ns max V
S
= 2 V, Test Circuit 4
t
OFF
4 4 ns typ R
L
= 300 , C
L
= 35 pF;
6 6 ns max V
S
= 2 V, Test Circuit 4
Charge Injection 1 1 pC typ V
S
= 1 V, R
S
= 0 , C
L
= 1.0 nF;
Test Circuit 5
Off Isolation –75 –65 dB typ R
L
= 50 , C
L
= 5 pF, f = 100 MHz;
Test Circuit 6
–3 dB Bandwidth 180 280 MHz typ R
L
= 50 , C
L
= 5 pF, Test Circuit 7
C
S
(OFF) 4 4 pF typ
C
D
(OFF) 4 4 pF typ
C
D
, C
S
(ON) 26 15 pF typ
POWER REQUIREMENTS V
DD
= +3.3 V
I
DD
0.001 0.001 µA typ Digital Inputs = 0 V or +3.3 V
0.1 0.5 0.1 0.5 µA max
NOTES
1
Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
(V
DD
= +3 V 10%, GND = 0 V, unless otherwise noted.)
A
REV.
ADG751
–4–
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the ADG751 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
ABSOLUTE MAXIMUM RATINGS
1
(T
A
= +25°C unless otherwise noted)
V
DD
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +6 V
Analog, Digital Inputs
2
. . . . . . . . . . . –0.3 V to V
DD
+0.3 V or
30 mA, Whichever Occurs First
Peak Current, S or D . . . . . . . . . . . . . . . . . . . . . . . . . . .100 mA
(Pulsed at 1 ms, 10% Duty Cycle Max)
Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . . 30 mA
Operating Temperature Range
Industrial (A, B Versions) . . . . . . . . . . . . . . –40°C to +85°C
Storage Temperature Range . . . . . . . . . . . . . –65°C to +150°C
Junction Temperature (T
J
Max) . . . . . . . . . . . . . . . . . .+150°C
Power Dissipation . . . . . . . . . . . . . . . . . . . . (T
J
Max–T
A
)/θ
JA
µSOIC Package
θ
JA
Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 206°C/W
θ
JC
Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . 44°C/W
SOT-23 Package
θ
JA
Thermal Impedance . . . . . . . . . . . . . . . . . . . . 229.6°C/W
θ
JC
Thermal Impedance . . . . . . . . . . . . . . . . . . . . 91.99°C/W
Lead Temperature, Soldering
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . +215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . +220°C
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability. Only one absolute
maximum rating may be applied at any one time.
2
Overvoltages at IN, S or D will be clamped by internal diodes. Current should be
limited to the maximum ratings given.
A
REV.
ADG751
–5–
TERMINOLOGY
V
DD
Most positive power supply potential.
GND Ground (0 V) reference.
S Source terminal. May be an input or output.
D Drain terminal. May be an input or output.
IN Logic control input.
R
ON
Ohmic resistance between D and S.
R
FLAT(ON)
Flatness is defined as the difference between
the maximum and minimum value of on resis-
tance as measured over the specified analog
signal range.
I
S
(OFF) Source leakage current with the switch “OFF.”
I
D
(OFF) Drain leakage current with the switch “OFF.”
I
D
, I
S
(ON) Channel leakage current with the switch “ON.”
V
D
(V
S
) Analog voltage on terminals D and S.
C
S
(OFF) “OFF” switch source capacitance.
C
D
(OFF) “OFF” switch drain capacitance.
C
D
, C
S
(ON) “ON” switch capacitance.
t
ON
Delay between applying the digital control
input and the output switching on. See Test
Circuit 4.
t
OFF
Delay between applying the digital control
input and the output switching off.
Off Isolation A measure of unwanted signal coupling
through an “OFF” switch.
Charge A measure of the glitch impulse transferred from
Injection the digital input to the analog output during
switching.
Bandwidth The frequency at which the output is attenu-
ated by –3 dBs.
On Response The frequency response of the “ON” switch.
Insertion Loss Loss due to the ON resistance of the switch.
V
INL
Maximum input voltage for Logic “0.”
V
INH
Minimum input voltage for Logic “1.”
I
INL
(I
INH
) Input current of the digital input.
I
DD
Positive supply current.
Table I. Truth Table
ADG751 IN Switch Condition
0ON
1 OFF
PIN CONFIGURATIONS
8-Lead SOIC
(RM-8)
1
2
3
4
8
7
6
5
TOP VIEW
(Not to Scale)
NC = NO CONNECT
ADG751
NC
NC
NC
D
V
DD
S
GND
IN
6-Lead SOT-23
(RT-6)
1
2
3
6
5
4
TOP VIEW
(Not to Scale)
NC = NO CONNECT
ADG751
IN
D
V
DD
S
NC
GND
A

ADG751ARTZ-REEL7

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Analog Switch ICs 65dB 150 Ohm 300MHz CMOS RF/Video SPST
Lifecycle:
New from this manufacturer.
Delivery:
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