74LVT74PW,118

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74LVT74
3.3V Dual D-type flip-flop
Product specification 1996 Aug 28
INTEGRATED CIRCUITS
IC24 Data Handbook
Philips Semiconductors Product specification
74LVT743.3V Dual D-type flip-flop
2
1996 Aug 28 853-1872 17244
QUICK REFERENCE DATA
SYMBOL PARAMETER
CONDITIONS
T
amb
= 25°C;
GND = 0V
TYPICAL UNIT
t
PLH
t
PHL
Propagation
delay
CPn to Qn
C
L
= 50pF;
V
CC
= 3.3V
3.1
3.6
ns
C
IN
Input
capacitance
V
I
= 0V or 3.0V 3 pF
I
CC
Total supply
current
V
CC
= 3.6V 0.5 mA
PIN CONFIGURATION
14
13
12
11
10
9
87
6
5
4
3
2
1
GND
V
CC
SD1
Q1
Q1
CP1
R
D1
D1
R
D0
D0
Q
0
CP0
S
D0
Q0
SF00045
LOGIC SYMBOL
Q0 Q0Q1Q1
56 98
V
CC
= Pin 14
GND = Pin 7
3
4
1
11
10
13
CP0
S
D0
R
D0
CP1
S
D1
RD1
D0 D1
212
SA00359
DESCRIPTION
The 74LVT74 is a dual positive edge-triggered D-type flip-flop
featuring individual data, clock, set, and reset inputs; also true and
complementary outputs. Set (S
D) and reset (RD) are asynchronous
active low inputs and operate independently of the clock input.
When set and reset are inactive (high), data at the D input is
transferred to the Q and Q
outputs on the low-to-high transition of
the clock. Data must be stable just one setup time prior to the
low-to-high transition of the clock for predictable operation. Clock
triggering occurs at a voltage level and is not directly related to the
transition time of the positive-going pulse. Following the hold time
interval, data at the D input may be changed without affecting the
levels of the output.
PIN DESCRIPTION
PIN NUMBER SYMBOL NAME AND FUNCTION
2, 12 D0, D1 Data inputs
3, 11 CP0, CP1 Clock inputs (active rising edge)
4, 10 SD0, SD1 Set inputs (active LOW)
1, 13 RD0, RD1 Reset inputs (active LOW)
5, 6, 8, 9 Qn, Qn Data outputs
LOGIC SYMBOL (IEEE/IEC)
4
3
2
1
10
11
12
13
5
6
9
8
&
S
S
C1
C2
R
1D
2D
R
SF00047
ORDERING INFORMATION
PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA DWG NUMBER
14-Pin Plastic SO –40°C to +85°C 74LVT74 D 74LVT74 D SOT108-1
14-Pin Plastic SSOP –40°C to +85°C 74LVT74 DB 74LVT74 DB SOT337-1
14-Pin Plastic TSSOP –40°C to +85°C 74LVT74 PW 74LVT74PW DH SOT402-1
Philips Semiconductors Product specification
74LVT743.3V Dual D-type flip-flop
1996 Aug 28
3
LOGIC DIAGRAM
V
CC
= Pin 14
GND = Pin 7
5, 9
6, 8
Q
Q
4, 10
1, 13
3, 11
2, 12
S
D
R
D
CP
D
SF00048
FUNCTION TABLE
INPUTS OUTPUTS
OPERATING
SD RD CP D Q Q
MODE
L H X X H L Asynchronous set
H L X X L H Asynchronous reset
L L X X H H Undetermined*
H H h H L Load “1”
H H l L H Load “0”
H H X NC NC Hold
NOTES:
H = High voltage level
h = High voltage level one setup time prior to low-to-high
clock transition
L = Low voltage level
l = Low voltage level one setup time prior to low-to-high
clock transition
NC= No change from the previous setup
X = Don’t care
= Low-to-high clock transition
= Not low-to-high clock transition
* = This setup is unstable and will change when either set
or reset return to the high level.
ABSOLUTE MAXIMUM RATINGS
1,
2
SYMBOL
PARAMETER CONDITIONS RATING UNIT
V
CC
DC supply voltage –0.5 to +4.6 V
I
IK
DC input diode current V
I
< 0 –50 mA
V
I
DC input voltage
3
–0.5 to +7.0 V
I
OK
DC output diode current V
O
< 0 –50 mA
V
OUT
DC output voltage
3
Output in Off or High state –0.5 to +7.0 V
I
OUT
DC out
p
ut current
Output in High state –32
mA
I
OUT
DC
out ut
current
Output in Low state 64
mA
T
stg
Storage temperature range –65 to 150 °C
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.
3. The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
LIMITS
UNIT
SYMBOL
PARAMETER
MIN MAX
UNIT
V
CC
DC supply voltage 2.7 3.6 V
V
I
Input voltage 0 5.5 V
V
IH
High-level input voltage 2.0 V
V
IL
Low-level Input voltage 0.8 V
I
OH
High-level output current –20 mA
I
OL
Low-level output current 32 mA
t/v Input transition rise or fall rate; Outputs enabled 10 ns/V
T
amb
Operating free-air temperature range –40 +85 °C

74LVT74PW,118

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
IC FF D-TYPE DUAL 1BIT 14TSSOP
Lifecycle:
New from this manufacturer.
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