Use low-ESR ceramic capacitors with high ripple-cur-
rent capability at the input. In the case of the boost
topology where the inductor is in series with the input,
the ripple current in the capacitor is the same as the
inductor ripple and the input capacitance is small.
Output Capacitors
The function of the output capacitor is to reduce the
output ripple to acceptable levels. The ESR, ESL, and
the bulk capacitance of the output capacitor contribute
to the output ripple. In most of the applications, the out-
put ESR and ESL effects can be dramatically reduced
by using low-ESR ceramic capacitors. To reduce the
ESL effects, connect multiple ceramic capacitors in
parallel to achieve the required bulk capacitance.
In a buck configuration, the output capacitance, C
OUT
,
is calculated using the following equation:
where ∆V
R
is the maximum allowable output ripple.
In a boost configuration, the output capacitance, C
OUT
,
is calculated as:
where I
LED
is the output current.
In a buck-boost configuration, the output capacitance,
C
OUT
is:
where V
LED
is the voltage across the load and I
LED
is
the output current.
Average Current Limit
The average current-mode control technique of the
MAX16821A/MAX16821B/MAX16821C accurately limits
the maximum output current in the case of the buck con-
figuration. The MAX16821A/MAX16821B/MAX16821C
sense the voltage across the sense resistor and limit the
peak inductor current (I
L-PK
) accordingly. The on-cycle
terminates when the current-sense voltage reaches
26.4mV (min). Use the following equation to calculate
the maximum current-sense resistor value:
Select a 5% lower value of R
S
to compensate for any
parasitics associated with the PCB. Select a non-induc-
tive resistor with the appropriate wattage rating. In the
case of the boost configuration, the MAX16821A/
MAX16821B/MAX16821C accurately limits the maxi-
mum input current. Use the following equation to calcu-
late the current-sense resistor value:
where I
IN
is the input current.
Compensation
The main control loop consists of an inner current loop
(inductor current) and an outer LED current regulation
loop. The MAX16821A/MAX16821B/MAX16821C use an
average current-mode control scheme to regulate the
LED current (Figure 2). The VEA output provides the
controlling voltage for the current source. The inner cur-
rent loop absorbs the inductor pole reducing the order of
the LED current loop to that of a single-pole system. The
major consideration when designing the current control
loop is making certain that the inductor downslope
(which becomes an upslope at the output of the CEA)
does not exceed the internal ramp slope. This is a nec-
essary condition to avoid subharmonic oscillations simi-
lar to those in peak current mode with insufficient slope
compensation. This requires that the gain at the output of
the CEA be limited based on the following equation:
Buck:
where V
RAMP
= 2V, g
m
= 550µS, A
V
= 34.5V/V, and
V
LED
is the voltage across the LED string.
The crossover frequency of the inner current loop is
given by:
For adequate phase margin place the zero formed by
R
CF
and C
CZ
at least 3 to 5 times below the crossover
frequency. The pole formed by R
CF
and C
CP
may not
be required in most applications but can be added to
minimize noise at a frequency at or above the switching
frequency.
.
.
