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74LVC132APW,118

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P17
74LVC132A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 3 — 7 December 2011 3 of 16
NXP Semiconductors
74LVC132A
Quad 2-input NAND Schmitt trigger
6. Pinning information
6.1 Pinning
6.2 Pin description
(1) The die substrate is attached to this pad using
conductive die attach material. It can not be used as
a supply pin or input.
Fig 4. Pin configuration SO14 and TSSOP14 Fig 5. Pin configuration DHVQFN14
74LVC132A
1A V
CC
1B 4B
1Y 4A
2A 4Y
2B 3B
2Y 3A
GND 3Y
001aaf590
1
2
3
4
5
6
7
8
10
9
12
11
14
13
Table 2. Pin description
Symbol Pin Description
1A 1 data input
1B 2 data input
1Y 3 data output
2A 4 data input
2B 5 data input
2Y 6 data output
GND 7 ground (0 V)
3Y 8 data output
3A 9 data input
3B 10 data input
4Y 11 data output
4A 12 data input
4B 13 data input
V
CC
14 supply voltage
74LVC132A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 3 — 7 December 2011 4 of 16
NXP Semiconductors
74LVC132A
Quad 2-input NAND Schmitt trigger
7. Functional description
[1] H = HIGH voltage level;
L = LOW voltage level.
8. Limiting values
[1] The minimum input voltage ratings may be exceeded if the input current ratings are observed.
[2] The output voltage ratings may be exceeded if the output current ratings are observed.
[3] When V
CC
= 0 V (Power-down mode), the output voltage can be 3.6 V in normal operation.
[4] For SO14 packages: P
tot
derates linearly with 8 mW/K above 70 C.
For TSSOP14 packages: P
tot
derates linearly with 5.5 mW/K above 60 C.
For DHVQFN14 packages: P
tot
derates linearly with 4.5 mW/K above 60 C.
9. Recommended operating conditions
Table 3. Function table
[1]
Input Output
nA nB nY
LLH
LHH
HLH
HHL
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Max Unit
V
CC
supply voltage 0.5 +6.5 V
V
I
input voltage
[1]
0.5 +6.5 V
V
O
output voltage
[2][3]
0.5 V
CC
+ 0.5 V
I
IK
input clamping current V
I
< 0 V 50 - mA
I
OK
output clamping current V
O
> V
CC
or V
O
< 0 V - 50 mA
I
O
output current V
O
= 0 V to V
CC
- 50 mA
I
CC
supply current - 100 mA
I
GND
ground current 100 - mA
T
stg
storage temperature 65 +150 C
P
tot
total power dissipation T
amb
= 40 C to +125 C
[4]
-500 mW
Table 5. Recommended operating conditions
Symbol Parameter Conditions Min Typ Max Unit
V
CC
supply voltage 1.65 - 3.6 V
functional 1.2 - - V
V
I
input voltage 0 - 5.5 V
V
O
output voltage 0 - V
CC
V
T
amb
ambient temperature 40 - +125 C
74LVC132A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 3 — 7 December 2011 5 of 16
NXP Semiconductors
74LVC132A
Quad 2-input NAND Schmitt trigger
10. Static characteristics
[1] All typical values are measured at V
CC
= 3.3 V (unless stated otherwise) and T
amb
=25C.
Table 6. Static characteristics
At recommended operating conditions. Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Typ
[1]
Max Unit
T
amb
= 40 C to +85 C
V
OH
HIGH-level output voltage V
I
=V
T+
or V
T
I
O
= 100 A; V
CC
= 1.65 V to 3.6 V V
CC
0.2 - - V
I
O
= 4mA; V
CC
= 1.65 V V
CC
0.45 - - V
I
O
= 8mA; V
CC
= 2.3 V V
CC
0.5 - - V
I
O
= 12 mA; V
CC
= 2.7 V V
CC
0.5 - - V
I
O
= 18 mA; V
CC
= 3.0 V V
CC
0.6 - - V
I
O
= 24 mA; V
CC
= 3.0 V V
CC
0.8 - - V
V
OL
LOW-level output voltage V
I
=V
T+
or V
T
I
O
=100 A; V
CC
= 1.65 V to 3.6 V - - 0.2 V
I
O
=4mA; V
CC
= 1.65 V - - 0.45 V
I
O
=8mA; V
CC
= 2.3 V - - 0.6 V
I
O
= 12 mA; V
CC
= 2.7 V - - 0.4 V
I
O
= 24 mA; V
CC
= 3.0 V - - 0.55 V
I
I
input leakage current V
CC
= 3.6 V; V
I
= 5.5 V or GND - 0.1 5 A
I
CC
supply current V
CC
= 3.6 V; V
I
= V
CC
or GND; I
O
= 0 A - 0.1 10 A
I
CC
additional supply current per input pin; V
CC
= 2.7 V to 3.6 V;
V
I
=V
CC
0.6 V; I
O
= 0 A
-5500A
C
I
input capacitance V
CC
= 0 V to 3.6 V; V
I
= GND to V
CC
-4.0-pF
T
amb
= 40 C to +125 C
V
OH
HIGH-level output voltage V
I
=V
T+
or V
T
I
O
= 100 A; V
CC
= 1.65 V to 3.6 V V
CC
0.3 - - V
I
O
= 4mA; V
CC
= 1.65 V V
CC
0.6 - - V
I
O
= 8mA; V
CC
= 2.3 V V
CC
0.65 - - V
I
O
= 12 mA; V
CC
= 2.7 V V
CC
0.65 - - V
I
O
= 18 mA; V
CC
= 3.0 V V
CC
0.75 - - V
I
O
= 24 mA; V
CC
= 3.0 V V
CC
1- - V
V
OL
LOW-level output voltage V
I
=V
T+
or V
T
I
O
=100 A; V
CC
= 1.65 V to 3.6 V - - 0.3 V
I
O
=4mA; V
CC
= 1.65 V - - 0.65 V
I
O
=8mA; V
CC
= 2.3 V - - 0.8 V
I
O
= 12 mA; V
CC
= 2.7 V - - 0.6 V
I
O
= 24 mA; V
CC
= 3.0 V - - 0.8 V
I
I
input leakage current V
CC
= 3.6 V; V
I
= 5.5 V or GND - - 20 A
I
CC
supply current V
CC
= 3.6 V; V
I
= V
CC
or GND; I
O
= 0 A - - 40 A
I
CC
additional supply current per input pin; V
CC
= 2.7 V to 3.6 V;
V
I
=V
CC
0.6 V; I
O
= 0 A
--5mA
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74LVC132APW,118

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Buy 74LVC132APW,118
Manufacturer:
Nexperia
Description:
Logic Gates 3.3V QUAD 2-INPT
Lifecycle:
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