LTC3104EDE#TRPBF Datasheet LTC3104EMSE#PBF, LTC3104IDE#PBF, LTC3104IMSE#PBF | P10-P12

LTC3104

3104fa

For more information www.linear.com/LTC3104

OPERATION

inductor current where the comparator trips is controlled

by the voltage on the output of the error amplifier. The FB

pin allows the internally compensated error amplifier to

receive an output feedback voltage from an external resis-

tive divider from V

OUT

. When the load current increases,

the output begins to fall causing a slight decrease in the

feedback voltage relative to the 0.6V reference, this in turn,

causes the control voltage to increase until the average

inductor current matches the new load current. While the

top MOSFET is off, the bottom MOSFET is turned on until

either the inductor current starts to reverse as indicated by

the current reversal comparator, I

ZERO

, or the beginning

of the next clock cycle. I

ZERO

is set to 40mA (typical) in

automatic Burst Mode operation and –110mA (typical) in

forced continuous mode.

Forced Continuous Mode

Grounding MODE enables forced continuous operation

and disables Burst Mode operation. At light loads, forced

continuous mode minimizes output voltage ripple and

noise but is less efficient than Burst Mode operation.

Forced continuous operation may be desirable for use in

applications that are sensitive to the Burst Mode output

voltage ripple or its harmonics. The LTC3104 offers a broad

range of possible step down ratios without pulse skipping

but for very small step-down ratios, the minimum on-time

of the main switch will be reached and the converter will

begin turning off for multiple cycles in order to maintain

regulation.

Burst Mode Operation

Holding the MODE pin above 1.2V will enable automatic

Burst Mode operation and disable forced continuous op-

eration. As the load current increases, the converter will

automatically transition between Burst Mode and PWM

operation. Conversely the converter will automatically

transition from PWM operation to Burst Mode operation

as the load decreases. Between bursts the converter is not

active (i.e., both switches are off) and most of the internal

circuitry is disabled to reduce the quiescent current to

2.6µA. Burst Mode entry and exit is determined by the peak

inductor current and therefore the load current at which

Burst Mode operation will be entered or exited depends

on the input voltage, the output voltage and the inductor

value. Typical curves for Burst Mode entry threshold are

provided in the Typical Performance Characteristics sec-

tion of this data sheet.

Soft-Start

The converter has an internal closed-loop soft-start circuit

with a nominal duration of 1.4ms. The converter remains

in regulation during soft-start and will therefore respond

to output load transients that occur during this time. In

addition, the output voltage rise time has minimal depen-

dency on the size of the output capacitor or load current.

Thermal Shutdown

If the die temperature exceeds 150°C (typical) the con-

verter and LDO will be disabled. All power devices will be

turned off and the switch node will be forced into a high

impedance state. The soft-start circuit is reset during

thermal shutdown to provide a smooth recovery once the

overtemperature condition is eliminated. If enabled, the

converter and the LDO will restart when the die temperature

drops to approximately 130°C.

Power Good Status Output

The PGOOD pin is an open-drain output which indicates

the output voltage status of the step-down converter. If the

output voltage falls 10% below the regulation voltage, the

PGOOD open-drain output will pull low. A built-in deglitch-

ing delay prevents false trips due to voltage transients on

load steps. The output voltage must rise 2% above the

falling threshold before the pull-down will turn off. The

PGOOD output will also pull low during overtemperature

shutdown and undervoltage lockout to indicate these fault

conditions. The PGOOD output is valid 1ms after the buck

converter is enabled. When the converter is disabled the

open-drain device is forced on into a low impedance state.

The PGOOD pull-up voltage must be below the 6V absolute

maximum voltage rating of the pin.

Current Limit

The peak inductor current limit comparator shuts off the

buck switch once the internal limit threshold is reached.

Peak switch current is no less than 400mA.

LTC3104

3104fa

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OPERATION

Slope Compensation

Current mode control requires the use of slope com-

pensation to prevent sub-harmonic oscillations in the

inductor current waveform at high duty cycle operation. In

some current mode ICs, current limiting is performed by

clamping the error amplifier voltage to a fixed maximum

which leads to a reduced output current capability at low

step-down ratios. Slope compensation is accomplished

on the LTC3104 internally through the addition of a com-

pensating ramp to the current sense signal. The current

limiting function is completed prior to the addition of the

compensation ramp and therefore achieves a peak inductor

current limit that is independent of duty cycle.

Short-Circuit Protection

When the output is shorted to ground, the error amplifier

will saturate high and the high side switch will turn on at

the start of each cycle and remain on until the current limit

trips. During this minimum on-time, the inductor current

will increase rapidly and will decrease very slowly during

the remainder of the period due to the very small reverse

voltage produced by a hard output short. To eliminate the

possibility of inductor current runaway in this situation, the

switching frequency is reduced to approximately 300kHz

when the voltage on FB falls below 0.3V.

BST Pin Function

The input switch driver operates from the voltage gener-

ated on the BST pin. An external capacitor between the SW

and BST pins and an internal synchronous PMOS boost

switch are used to generate a voltage that is higher than

the input voltage. When the synchronous rectifier is on

(SW is low) the internal boost switch connects one side

of the capacitor to V

replenishing its charge. When the

synchronous rectifier is turned off the input switch is turned

on forcing SW high and the BST pin is at a potential equal

to V

+ SW, relative to ground.

A comparator ensures there is sufficient voltage across

the boost capacitor to guarantee start-up after long sleep

periods or if starting up into a pre-biased output.

Undervoltage Lockout

The LTC3104 has an internal UVLO which disables the

converter if the supply voltage decreases below 2.1V (typi-

cal). The soft-start for the converter will be reset during

undervoltage lockout to provide a smooth restart once the

input voltage increases above the undervoltage lockout

threshold. The RUN pin can alternatively be configured as

a precise undervoltage lockout (UVLO) on the V

supply

with a resistive divider connected to the RUN pin.

LDO

OUTPUT

The V

LDO

output utilizes an internal PMOS pass device

that is guaranteed to support a 10mA load with a typi-

cal dropout voltage of 150mV. The LDO is powered by

the V

INLDO

input which can be tied to an independent

power source or to the V

OUT

of the step-down converter.

INLDO

can be tied to V

only if V

is guaranteed to be

within the absolute maximum ratings of the V

INLDO

pin.

The quiescent current will increase by about 0.3µA when

INLDO

is tied to V

. The V

LDO

output is only active when

is greater than the UVLO threshold and the RUNLDO

pin is high but can be disabled independently by bringing

RUNLDO below 0.5V.

The LDO is specifically designed to be stable with a small

4.7µF capacitor, but to also maintain stable operation with

arbitrarily large capacitance values without requiring a

series resistor. The LDO output is current-limit protected

to 20mA (typ). During an undervoltage or overtemperature

fault, the LDO is disabled until the fault condition clears.

LTC3104

3104fa

For more information www.linear.com/LTC3104

APPLICATIONS INFORMATION

The basic LTC3104 application circuit is shown as the

Typical Application on the front page of this data sheet.

The external component selection is determined by the

desired output voltage, output current, desired noise im-

munity and ripple voltage requirements for each particular

application. However, basic guidelines and considerations

for the design process are provided in this section.

Inductor Selection

The choice of inductor value influences both the efficiency

and the magnitude of the output voltage ripple. Larger in-

ductance values will reduce inductor current ripple and will

therefore lead to lower output voltage ripple. For a fixed DC

resistance, a larger value inductor will yield higher efficiency

by lowering the peak current to be closer to the average.

However, a larger value inductor within the same family

will generally have a greater series resistance, thereby

offsetting this efficiency advantage. Given a desired peak

to peak current ripple, ∆I

(A), the required inductance

can be calculated via the following expression:

L ≥

OUT

1.2•∆I

• 1–

OUT













µH

( )

A reasonable choice for ripple current is ∆I

= 120mA

which represents 40% of the maximum 300mA load

current. The DC current rating of the inductor should be

at least equal to the maximum load current plus half the

ripple current in order to prevent core saturation and loss

of efficiency during operation. To optimize efficiency the

inductor should have a low series resistance. In particularly

space restricted applications it may be advantageous to

use a much smaller value inductor at the expense of larger

ripple current. In such cases, the converter will operate

in discontinuous conduction for a wider range of output

loads and efficiency will be reduced. In addition, there is a

minimum inductor value required to maintain stability of the

current loop (given the fixed internal slope compensation).

Specifically, if the buck converter is going to be utilized at

duty cycles greater than 40%, the inductance value must

be at least L

MIN

as given by the following equation:

MIN

≥ 2.5 • V

OUT

(µH)

Table 1 depicts the minimum required inductance for

several common output voltages using standard induc-

tor values.

Table 1. Minimum Inductance

OUTPUT VOLTAGE (V) MINIMUM INDUCTANCE (µH)

0.8 2.2

1.2 3.3

2.0 5.6

2.7 6.8

3.3 8.3

5.0 15

A large variety of low ESR, power inductors are available

that are well suited to the LTC3104 converter applications.

The trade-off generally involves PCB area, application

height, required output current and efficiency. Table 2

provides a representative sampling of small surface mount

inductors that are well suited for use with the LTC3104

buck converter. The inductor specifications listed are for

comparison purposes but other values within these induc-

tor families are generally well suited to this application

as well. Within each family (i.e., at a fixed inductor size),

the DC resistance generally increases and the maximum

current generally decreases with increased inductance.

Output Capacitor Selection

A low ESR output capacitor should be utilized at the buck

output in order to minimize voltage ripple. Multilayer ce-

ramic capacitors are an excellent choice as they have low

ESR and are available in small footprints. In addition to

controlling the output ripple magnitude, the value of the

output capacitor also sets the loop crossover frequency

and therefore can impact loop stability. There is both a

minimum and maximum capacitance value required to

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Switching Voltage Regulators 300mA, 15V Step-Down DC/DC Converter with Ultralow Quiescent Current and 10mA LDO

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