74AUP2G3404 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 1 — 22 August 2012 9 of 19
NXP Semiconductors
74AUP2G3404
Low-power buffer and inverter
[1] All typical values are measured at nominal V
CC
.
[2] t
pd
is the same as t
PLH
and t
PHL
.
[3] All specified values are the average typical values over all stated loads.
[4] C
PD
is used to determine the dynamic power dissipation (P
D
in W).
P
D
=C
PD
V
CC
2
f
i
N+(C
L
V
CC
2
f
o
) where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= load capacitance in pF;
V
CC
= supply voltage in V;
N = number of inputs switching;
(C
L
V
CC
2
f
o
) = sum of the outputs.
12. Waveforms
C
L
= 5 pF, 10 pF, 15 pF and 30 pF
C
PD
power
dissipation
capacitance
f
i
= 1 MHz; V
I
= GND to V
CC
[3]
[4]
V
CC
= 0.8 V - 2.5 - - - - pF
V
CC
= 1.1 V to 1.3 V - 2.7 - - - - pF
V
CC
= 1.4 V to 1.6 V - 2.8 - - - - pF
V
CC
= 1.65 V to 1.95 V - 3.0 - - - - pF
V
CC
= 2.3 V to 2.7 V - 3.5 - - - - pF
V
CC
= 3.0 V to 3.6 V - 4.0 - - - - pF
Table 9. Dynamic characteristics
…continued
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 8.
Symbol Parameter Conditions 25 C 40 C to +125 C Unit
Min Typ
[1]
Max Min Max
(85 C)
Max
(125 C)
Measurement points are given in Table 10.
Logic levels: V
OL
and V
OH
are typical output voltage levels that occur with the output load.
Fig 7. The data input 1A to output 1Y and input 2A to output 2Y propagation delays
t
PHL
t
PLH
V
M
V
M
V
M
V
M
V
M
V
M
V
M
V
M
GND
V
I
V
OH
V
OL
aaa-002992
2A input
2Y output
GND
V
OH
V
OL
1A input
1Y output
t
PLH
t
PHL
V
I
Table 10. Measurement points
Supply voltage Output Input
V
CC
V
M
V
M
V
I
t
r
= t
f
0.8 V to 3.6 V 0.5 V
CC
0.5 V
CC
V
CC
3.0 ns
