PIMZ2_PUMZ2_6 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 06 — 17 November 2009 3 of 9
NXP Semiconductors
PIMZ2; PUMZ2
NPN/PNP general-purpose double transistors
5. Limiting values
[1] Device mounted on an FR4 printed-circuit board.
6. Thermal characteristics
[1] Device mounted on an FR4 printed-circuit board.
Table 6. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
Per transistor; for the PNP transistor with negative polarity
V
CBO
collector-base voltage open emitter - 60 V
V
CEO
collector-emitter voltage open base - 50 V
V
EBO
emitter-base voltage open collector - 7 V
I
C
collector current (DC) - 150 mA
I
CM
peak collector current - 200 mA
I
BM
peak base current - 100 mA
P
tot
total power dissipation T
amb
≤ 25 °C
SOT457
[1]
-200mW
SOT363
[1]
-180mW
T
stg
storage temperature −65 +150 °C
T
j
junction temperature - 150 °C
T
amb
ambient temperature −65 +150 °C
Per device
P
tot
total power dissipation T
amb
≤ 25 °C
SOT457
[1]
-300mW
SOT363
[1]
-300mW
Table 7. Thermal characteristics
Symbol Parameter Conditions Min Typ Max Unit
Per transistor
R
th(j-a)
thermal resistance from
junction to ambient
T
amb
≤ 25 °C
SOT457
[1]
--625K/W
SOT363
[1]
--694K/W
Per device
R
th(j-a)
thermal resistance from
junction to ambient
T
amb
≤ 25 °C
SOT457
[1]
--417K/W
SOT363
[1]
--417K/W