NB3N201S, NB3N206S
www.onsemi.com
16
Figure 17. M−LVDS Receiver Output: VCC (CHANNEL 1), R Pin (CHANNEL 2)
Simplex Theory Configurations: Data flow is
unidirectional and Point−to−Point from one Driver to one
Receiver. NB3N201SDG and NB3N206SDG devices
provide a high signal current allowing long drive runs and
high noise immunity. Single terminated interconnects yield
high amplitude levels. Parallel terminated interconnects
yield typical MLVDS amplitude levels and minimizes
reflections. See Figures 18 and 19. A NB3N201SDG and
NB3N206SDG can be used as the driver or as a receiver.
Figure 18. Point−to−Point Simplex Single
Termination
Figure 19. Parallel−Terminated Simplex
Simplex Multidrop Theory Configurations: Data flow is
unidirectional from one Driver with one or more Receivers
Multiple boards required. Single terminated interconnects
yield high amplitude levels. Parallel terminated
interconnects yield typical MLVDS amplitude levels and
minimizes reflections. On the Evaluation Test Board,
Headers P1, P2, and P3 may be used as need to interconnect
transceivers to a each other or a bus. See Figures 20 and 21.
A NB3N201SDG and NB3N206SDG can be used as the
driver or as a receiver.
