AD7524AQ Datasheet AD7524JRZ, AD7524JNZ, AD7524KPZ | P4-P6

AD7524

REV. B

–3–

ABSOLUTE MAXIMUM RATINGS*

= +25°C, unless otherwise noted)

to GND . . . . . . . . . . . . . . . . . . . . . . . . . . .–0.3 V, +17 V

RFB

to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 V

REF

to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 V

Digital Input Voltage to GND . . . . . . . . –0.3 V to V

+0.3 V

OUT1, OUT2 to GND . . . . . . . . . . . . . –0.3 V to V

+0.3 V

Power Dissipation (Any Package)

To +75°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 450 mW

Derates above 75°C by . . . . . . . . . . . . . . . . . . . . 6 mW/°C

Operating Temperature

Commercial (J, K, L) . . . . . . . . . . . . . . . . . –40°C to +85°C

Industrial (A, B, C) . . . . . . . . . . . . . . . . . . –40°C to +85°C

Extended (S, T, U) . . . . . . . . . . . . . . . . . –55°C to +125°C

Storage Temperature . . . . . . . . . . . . . . . . . . –65°C to +150°C

Lead Temperature (Soldering, 10 secs) . . . . . . . . . . . +300°C

*Stresses above those listed under “Absolute Maximum Ratings” may cause

permanent damage to the device. This is a stress rating only and functional

operation of the device at these or any other conditions above those indicated in the

operational sections of this specification is not implied. Exposure to absolute

maximum rating conditions for extended periods may affect device reliability.

WARNING!

ESD SENSITIVE DEVICE

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily

accumulate on the human body and test equipment and can discharge without detection.

Although the AD7524 features proprietary ESD protection circuitry, permanent damage may

occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD

precautions are recommended to avoid performance degradation or loss of functionality.

TERMINOLOGY

RELATIVE ACCURACY: A measure of the deviation from a

straight line through the end points of the DAC transfer function.

Normally expressed as a percentage of full scale range. For the

AD7524 DAC, this holds true over the entire V

REF

range.

RESOLUTION: Value of the LSB. For example, a unipolar con-

verter with n bits has a resolution of (2

–n

) (V

REF

). A bipolar con-

verter of n bits has a resolution of [2

–(n–1)

] [V

REF

]. Resolution in no

way implies linearity.

GAIN ERROR: Gain Error is a measure of the output error be-

tween an ideal DAC and the actual device output. It is measured

with all 1s in the DAC after offset error has been adjusted out

and is expressed in LSBs. Gain Error is adjustable to zero with

an external potentiometer.

FEEDTHROUGH ERROR: Error caused by capacitive cou-

pling from V

REF

to output with all switches OFF.

OUTPUT CAPACITANCE: Capacity from OUT1 and

OUT2 terminals to ground.

OUTPUT LEAKAGE CURRENT: Current which appears

on OUT1 terminal with all digital inputs LOW or on OUT2

terminal when all inputs are HIGH. This is an error current

which contributes an offset voltage at the amplifier output.

PIN CONFIGURATIONS

DIP, SOIC PLCC

LCCC

AD7524

REV. B

–4–

WRITE MODE

When CS and WR are both LOW, the AD7524 is in the

WRITE mode, and the AD7524 analog output responds to data

activity at the DB0–DB7 data bus inputs. In this mode, the

AD7524 acts like a nonlatched input D/A converter.

HOLD MODE

When either CS or WR is HIGH, the AD7524 is in the HOLD

mode. The AD7524 analog output holds the value correspond-

ing to the last digital input present at DB0–DB7 prior to

WR or

CS assuming the HIGH state.

MODE SELECTION TABLE

CS WR Mode DAC Response

L L Write DAC responds to data bus

(DB0–DB7) inputs.

H X Hold Data bus (DB0–DB7) is

Locked Out:

X H Hold DAC holds last data present

when

WR or CS assumed

HIGH state.

L = Low State, H = High State, X = Don't Care.

WRITE CYCLE TIMING DIAGRAM

Figure 3. Supply Current vs. Logic Level

Typical plots of supply current, I

, versus logic input voltage,

, for V

= +5 V and V

= +15 V are shown above.

CIRCUIT DESCRIPTION

CIRCUIT INFORMATION

The AD7524, an 8-bit multiplying D/A converter, consists of a

highly stable thin film R-2R ladder and eight N-channel current

switches on a monolithic chip. Most applications require the

addition of only an output operational amplifier and a voltage

or current reference.

The simplified D/A circuit is shown in Figure 1. An inverted

R-2R ladder structure is used—that is, the binarily weighted

currents are switched between the OUT1 and OUT2 bus lines,

thus maintaining a constant current in each ladder leg indepen-

dent of the switch state.

Figure 1. Functional Diagram

EQUIVALENT CIRCUIT ANALYSIS

The equivalent circuit for all digital inputs LOW is shown in

Figures 2. In Figure 2 with all digital inputs LOW, the refer-

ence current is switched to OUT2. The current source I

LEAKAGE

is composed of surface and junction leakages to the substrate

while the

256

current source represents a constant 1-bit cur-

rent drain through the termination resistor on the R-2R ladder.

The “ON” capacitance of the output N-channel switches is

120 pF, as shown on the OUT2 terminal. The “OFF” switch

capacitance is 30 pF, as shown on the OUT1 terminal. Analysis

of the circuit for all digital inputs high is similar to Figure 2

however, the “ON” switches are now on terminal OUT1, hence

the 120 pF appears at that terminal.

Figure 2. AD7524 DAC Equivalent Circuit—All Digital

Inputs Low

INTERFACE LOGIC INFORMATION

MODE SELECTION

AD7524 mode selection is controlled by the CS and WR inputs.

AD7524

REV. B

–5–

ANALOG CIRCUIT CONNECTIONS

Figure 4. Unipolar Binary Operation

(2-Quadrant Multiplication)

Table I. Unipolar Binary Code Table

Digital Input

MSB LSB Analog Output

1111 1111 –V

REF

(255/256)

1000 0001 –V

REF

(129/256)

1000 0000 –V

REF

(128/256) = –V

REF

0111 1111 –V

REF

(127/256)

0000 0001 –V

REF

(1/256)

0000 0000 –V

REF

(0/256) = 0

Note: 1 LSB = (2

–8

)(V

REF

) = 1/256 (V

REF

)

MICROPROCESSOR INTERFACE

Figure 6. AD7524/8085A Interface

Figure 5. Bipolar (4-Quadrant) Operation

Table II. Bipolar (Offset Binary) Code Table

Digital Input

MSB LSB Analog Output

1111 1111 +V

REF

(127/128)

1000 0001 +V

REF

(1/128 )

1000 0000 0

0111 1111 –V

REF

(1/128)

0000 0001 –V

REF

(127/128)

0000 0000 –V

REF

(128/128)

Note: 1 LSB = (2

–7

)(V

REF

) = 1/128 (V

REF

)

Figure 7. AD7524/MC6800 Interface

AD7524

P1-P3 P4-P6 P7-P9

AD7524AQ

Mfr. #:

Buy AD7524AQ

Manufacturer:

Analog Devices Inc.

Description:

Digital to Analog Converters - DAC CMOS 8-Bit Buffered Multiplying

Lifecycle:

New from this manufacturer.

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AD7524AQ

AD7524AQ

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