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CS3001-ISZ

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16
CS3001
CS3002
DS490F9 7
Typical Performance Plots (Cont.)
-3
-2
-1
0
1
2
3
012345
Common Mode Voltage (Vs = 5V)
Bias Current
Normalized to CM = 2.5 V
Figure 12. Input Bias Current vs. Common Mode Voltage
-200
-150
-250
-100
-50
V+
V–
+50
+100
+150
+200
+250
01234 5
Output Current (mA)
Output Vol tage (mV )
+125°C
-40°C
+125°C
+25
°C
+25°C
-40°C
Figure 13. Voltage Swing vs. Output Current (2.7 V)
-200
-150
-250
-100
-50
V+
V–
+50
+100
+150
+200
+250
01234 5
Output Current (mA)
Output Vol tage (mV)
+125°C
-40°C
+125°C
+25
°C
+25°C
-40°C
Figure 14. Voltage Swing vs. Output Current (5 V)
CS3001
CS3002
8 DS490F9
3. CS3001/CS3002 OVERVIEW
The CS3001/CS3002 amplifiers are designed for
precision measurement of signals from DC to
2 kHz when operating from a supply voltage of
+2.7 V to +6.7 V (± 1.35 to ± 3.35 V). The ampli-
fiers are designed with a patented architecture that
utilizes multiple amplifier stages to yield very high
open loop gain at frequencies of 10 kHz and below.
The amplifiers yield low noise and low offset drift
while consuming relatively low supply current. An
increase in noise floor above 2 kHz is the result of
intermediate stages of the amplifier being operated
at very low currents. The amplifiers are intended
for amplifying small signals with large gains in ap-
plications where the output of the amplifier can be
band-limited to frequencies below 2 kHz.
3.1 Open-loop Gain and Phase
Response
Figure 15 illustrates the open loop gain and phase
response of the CS3001/CS3002. The gain slope of
the amplifier is about –100 dB/decade between
500 Hz and 60 kHz and transitions to –20 dB/de-
cade between 60 kHz and its unity gain crossover
frequency at about 4.8 MHz. Phase margin at unity
gain is about 70 degrees; gain margin is about
20 dB.
-360
-315
-270
-225
-180
-135
-90
-45
10K
100K
1M
10M
Gain (dB)
Phase (Degrees)
0
20
40
60
80
100
-100 dB/ dec
-20 dB/ dec
Figure 15. CS3001/CS3002 Open-loop Gain and Phase Response
CS3001
CS3002
DS490F9 9
3.2 Open-loop Gain and Stability Compensation
3.2.1 Discussion
The CS3001 and CS3002 achieve ultra-high open
loop gain. Figure 16 illustrates the amplifier in a
non-inverting gain configuration. The open loop
gain and phase plots indicate that the amplifier is
stable for closed-loop gains less than 50 V/V and
R1 ≤ 100 Ohms. For a gain of 50, the phase margin
is between 40° and 60° depending upon the loading
conditions. As shown in Figure 17, on page 10, the
operational amplifier has an input capacitance at
the + and – signal inputs of typically 50 pF. This
capacitance adds an additional pole in the loop gain
transfer function at a frequency of f = 1/(2πR*C
in
)
where R is the parallel combination of R1 and R2
(R1 || R2). A higher value for R produces a pole at
a lower frequency, thus reducing the phase margin.
R1 is recommended to be less than or equal to 100
ohms, which results in a pole at 30 MHz or higher.
If a higher value of R1 is desired, a compensation
capacitor (C2) should be added in parallel with R2.
C2 should be chosen such that R2*C2 ≥ R1*C
in
.
R1
R2
Vin
Vo
R
S
Figure 16. Non-inverting Gain Configuration
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16

CS3001-ISZ

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Buy CS3001-ISZ
Manufacturer:
Cirrus Logic
Description:
Precision Amplifiers Low-Noise Op Amp Single 2.1mA
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