CS3001-ISZR Datasheet CS3001-ISZ, CS3001-ISZR | P10-P12

CS3001

CS3002

10 DS490F9

The feedback capacitor C2 is required for closed-

loop gains greater than 50 V/V. The capacitor in-

troduces a pole and a zero in the loop gain transfer

function,

This indicates that the separation of the pole and

the zero is governed by the closed loop gain. It is

required that the zero falls on the steep slope

(–100 dB/decade) of the loop gain plot so that there

is some gain higher than 0 dB (typically 20 dB) at

the hand-over frequency (the frequency at which

the slope changes from – 100 dB/decade to

–20 dB/decade).

50 pF

Vin

Choose C2 so that R2 • C2 ≥ ?R1 • C

Figure 17. Non-inverting Gain Configuration with Compensation

-----+





–

-----+





-----------------------

2π R

()C

-------------------------------------

2π R

()

-------------------------

≅=forR

2π AR

×()C

-----------------------------------=whereA

------=

2π R

()C

-------------------------=

CS3001

CS3002

DS490F9 11

The loop gain plot shown in Figure 18 illustrates

the unity gain configuration, and indicates how this

is modified when using the amplifier in a higher

gain configuration with compensation. If it is con-

figured for higher gain, for example, 60 dB, the

x–axis will move up by 60 dB (line B). Capacitor

C2 adds a zero and a pole. The modified plot indi-

cates the effects of introducing the pole and zero

due to capacitor C2. The pole can be located at any

frequency higher than the hand-over frequency, the

zero has to be at a frequency lower than the hand-

over frequency so as to provide adequate gain mar-

gin. The separation between the pole and the zero

is governed by the closed loop gain. The zero (z

)

occurs at the intersection of the –100 dB/decade

and –80 dB/decade slopes. The point X in the fig-

ure should be at closed loop gain plus 20 dB gain

margin. The value for C2 = 1/(2π R1 P1). Setting

the pole of the filter to P1 = 1 MHz works very well

and is independent of gain. As the closed loop gain

is changed, the zero location is also modified if R1

remains fixed. Capacitor C2 can be increased in

value to limit the amplifier’s rising noise above

2kHz.

-100 dB/dec

|T| (Log gain)

-80 dB/dec

Margin

-20 dB/dec

50kHz 1MHz 5MHz

Desired Closed

Loop Gain

FREQUENCY

Figure 18. Loop Gain Plot: Unity Gain and with Pole-zero Compensation

CS3001

CS3002

12 DS490F9

3.2.2 Gain Calculations Summary and

Recommendations

Condition #1: |Av| ≤ 50 and R1 ≤ 100 Ω

The Opamp is inherently stable for |Av| ≤ 50 and

R1 ≤ 100 Ω . No C2 compensation capacitor across

R2 is required.

• |Av| = 1 configuration has 70° phase margin

and 20 dB gain margin.

• |Av| = 50 configuration has phase margin be-

tween 40° for C

LOAD

≤ 100 pF and 60° for

LOAD

= 0pF.

Condition #2: |Av| ≤ 50 and R1 > 100 Ω

Compensation capacitor C2 across R2 is required.

Calculate C2 using the following formula:

•C2≥ (R1 • C

) / R2, where Cin = 50 pF

Condition #3: |Av| > 50

Compensation capacitor C2 across R2 is required.

Calculate and verify a value for C2 using the fol-

lowing steps.

Calculate the Compensation Capacitor Value:

1) Calculate a value for C2 using the following

formula:

C2 =1/[2π (R1|

|R2) • P1], where P1 = 1 MHz

To simplify the calculation, set the pole of the filter

to P1 = 1 MHz. P1 must be set higher than the

opamp’s internal 50 kHz crossover frequency.

2) Calculate a second value for C2 using the fol-

lowing formula:

C2 ≥ (R1 • C

) / R2, where Cin = 50 pF

3) Use the larger of the two values calculated in

steps 1 & 2.

Verify the Opamp Compensation:

Verify the opamp compensation using the open-

loop gain and phase response Bode plot in

Figure 15. Plot the calculated closed loop gain

transfer function and verify the following design

criteria are met:

• Pole P1 > opamp internal 50 kHz crossover fre-

quency

- P1=1/[2π (R1|

|R2) • C2], where P1 = 1 MHz

- To simplify the calculation, set the pole to

P1 = 1 MHz.

• Z1 < opamp internal 50 kHz crossover frequency

- Z1=1/(2π R2 • C2)

• Gain margin above the open-loop gain transfer

function is required. A gain margin of +20 dB

above the open loop gain transfer function is

optimal.

3.3 Powerdown (PDWN)

The CS3001 single amplifier provides a power-

down function on pin 1. If this pin is left open the

amplifier will operate normally. If the powerdown

is asserted low, the amplifier will go into a low

power state. There is a pull-up resistor (approxi-

mately 800 kΩ) inside the amplifier from pin 1 to

the V+ supply. The current through this pull-up re-

sistor is the main source of current drain in the

powerdown state.

P1-P3 P4-P6 P7-P9 P10-P12 P13-P15 P16-P16

CS3001-ISZR

Mfr. #:

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Precision Amplifiers IC Ultra Low-Noise Op Amp

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CS3001-ISZR

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