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5T93GL06NLGI8
P1-P3
P4-P6
P7-P9
P10-P12
P13-P15
P16-P18
2.5V LVDS, 1:6 GLITCHLESS CLOCK BUFFER
TERABUFFER™ II
13
REVISION C 3/16/15
5T93GL06 DATA SHEET
Test Circuits and Conditions
Test Circuit for
Differential Input
Table 6A. Differential
Input Test Conditions
Symbol
V
DD
= 2.5V ± 0.2V
Unit
V
THI
Crossing of A and A
V
V
DD
/2
D.U.T
.
A
A
Pul
se
Generator
~50
Transmi
ssion Line
~50
Transmi
ssion Line
V
IN
V
IN
-V
DD
/2
Scope
50
50
REVISION C 3/16/15
14
2.5V LVDS, 1:
6 GLITCHLESS CLOCK BUFFER TERABUFFER™ II
5T93GL06 DATA
SHEET
Test Circuit for DC Outputs and Power Down Tests
Test Circuit for Propagation, Skew, and Gat
e Enable/Disable Timing
Table 6B. Differential
Input Test Conditions
NOTE 1: Specifications onl
y apply to “Normal Operations” test condition. Th
e T
IA
/E
IA
specification load
is for reference onl
y.
NOTE 2: The scope inputs are assumed to have a 2pF load to ground. T
IA
/E
IA
– 644 specifies 5pF between the output pa
ir.
With C
L
= 8pF, this gives the test circuit appropriate 5pF equivale
nt load.
Symbol
V
DD
= 2.5V ± 0.2V
Unit
C
L
0
(1)
pF
8
(1,2)
pF
R
L
50
V
DD
D.U.T.
A
A
Qn
Qn
Pul
se
Generator
R
L
R
L
V
OS
V
OD
V
DD
/2
D.U.T.
A
A
Qn
Qn
Pulse
Generator
50
50
Z=
5
0
Z=
5
0
SC
OPE
C
L
-V
DD
/2
C
L
2.5V LVDS, 1:6 GLITCHLESS CLOCK BUFFER
TERABUFFER™ II
15
REVISION C 3/16/15
5T93GL06 DATA SHEET
Recommended Landing Pattern
6.30
4.80
4.80
6.30
5.20
5.20
0.65
0.35
1
2
3
N
P1-P3
P4-P6
P7-P9
P10-P12
P13-P15
P16-P18
5T93GL06NLGI8
Mfr. #:
Buy 5T93GL06NLGI8
Manufacturer:
IDT
Description:
Clock Buffer 2.5V LVDS 1:6 Clock Buffer
Lifecycle:
New from this manufacturer.
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