10
FN4019.5
April 23, 2007
FIGURE 24. INPUT NOISE CHARACTERISTICS
FIGURE 25. SETTLING RESPONSE
Typical Performance Curves V
SUPPLY
= ±5V, T
A
= +25°C, R
F
= Value From the Optimum Feedback Resistor Table, R
L
= 100Ω,
Unless Otherwise Specified (Continued)
100
10
1
0.1k 1k 10k 100k
100
10
1
FREQUENCY (Hz)
NOISE VOLTAGE (nV/Hz)
NOISE CURRENT (pA/Hz
)
I
NI-
E
NI
I
NI+
I
NI+
30 50 7020 40 60
TIME (ns)
10 80 10090
0.1
0.05
-0.025
0
0.025
-0.05
-0.1
SETTLING ERROR (%)
V
OUT
= 2V
A
V
= +2
HFA1109
11
FN4019.5
April 23, 2007
Die Characteristics
DIE DIMENSIONS:
59milsx80milsx19mils
1500μmx2020μmx483μm
METALLIZATION:
Type: Metal 1: AICu(2%)/TiW
Thickness: Metal 1: 8kÅ ±0.4kÅ
Type: Metal 2: AICu(2%)
Thickness: Metal 2: 16kÅ ±0.8kÅ
GLASSIVATION:
Type: Nitride
Thickness: 4kÅ ±0.5kÅ
TRANSISTOR COUNT:
130
SUBSTRATE POTENTIAL (POWERED UP):
Floating (Recommend Connection to V-)
Metallization Mask Layout
HFA1109
V-
OUT
+IN
-IN
V+
NC
NCNC
NC
NC
NC
NC
NC
HFA1109
12
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Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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FN4019.5
April 23, 2007
HFA1109
Small Outline Plastic Packages (SOIC)
INDEX
AREA
E
D
N
123
-B-
0.25(0.010) C AM BS
e
-A-
L
B
M
-C-
A1
A
SEATING PLANE
0.10(0.004)
h x 45°
C
H
0.25(0.010) BM M
α
NOTES:
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Inter-
lead flash and protrusions shall not exceed 0.25mm (0.010 inch) per
side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater
above the seating plane, shall not exceed a maximum value of
0.61mm (0.024 inch).
10. Controlling dimension: MILLIMETER. Converted inch dimensions
are not necessarily exact.
M8.15 (JEDEC MS-012-AA ISSUE C)
8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE
SYMBOL
INCHES MILLIMETERS
NOTESMIN MAX MIN MAX
A 0.0532 0.0688 1.35 1.75 -
A1 0.0040 0.0098 0.10 0.25 -
B 0.013 0.020 0.33 0.51 9
C 0.0075 0.0098 0.19 0.25 -
D 0.1890 0.1968 4.80 5.00 3
E 0.1497 0.1574 3.80 4.00 4
e 0.050 BSC 1.27 BSC -
H 0.2284 0.2440 5.80 6.20 -
h 0.0099 0.0196 0.25 0.50 5
L 0.016 0.050 0.40 1.27 6
N8 87
α
-
Rev. 1 6/05

HFA1109IB

Mfr. #:
Manufacturer:
Renesas / Intersil
Description:
IC OPAMP CFA 450MHZ 8-SOIC
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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