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AD9739-R2-EBZ

P1-P3P4-P6P7-P8
AD9739-R2-EBZ
Quick Start Guide
One Technology Way • P. O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel : 781.329.4700 • Fax: 781.461.3113 • www.analog.com
Getting Started with the AD9739-R2-EBZ Evaluation Board
WHAT’S IN THE BOX
AD9739-R2-EBZ Evaluation Board
Evaluation Board CD
Mini-USB Cable
RECOMMENDED EQUIPMENT
Low Phase Noise Sinusoidal Signal Generator or ADF4350
Evaluation Board
Spectrum Analyzer
Data Pattern Generator Series 2 (DPG2)
INTRODUCTION
The purpose of this document is to get the AD9739 evaluation board up and running as quickly as possible and provide guidance on how
to optimize the controllers in the part to get the optimal performance out of the AD9739.
SOFTWARE
The AD9739-R2-EBZ is designed to receive data from a DPG2. The DAC Software Suite, plus the AD9739 Update, is required for
evaluation. The DAC Software Suite is included on the Evaluation Board CD, or can be downloaded from the DPG web site at
http://www.analog.com/dpg. This will install DPGDownloader (for loading vectors into the DPG2) and the AD9739 SPI application.
HARDWARE SETUP
To operate the board, a power supply capable of +5vdc, 2A should be connected to J17. A spectrum analyzer or an oscilloscope to view
the DAC output should be connected to J1. The diagram in Figure 1 shows the location of each connection. A low jitter (< 0.5psec RMS)
sine or square wave clock source should be connected to J3. The DC level of the clock is unimportant since the clock is AC-coupled on
the evaluation board before the CLKP/N inputs. The included USB cable should be used to connect the Evaluation Board to a PC. Note
that the software described above should be installed before connecting the USB cable.
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 www.analog.com
Fax: 781.461.3113 ©2010 Analog Devices, Inc. All rights reserved.
Figure 1
Quick Start Guide AD9739-R2-EBZ
Rev. A | Page 2 of 8
GETTING STARTED
This quick-start will setup a single-tone output from the AD9739 to provide a brief introduction to the part, as well as a basic
functionality test. To begin, open the AD9739 SPI application (Start > Programs > Analog Devices > AD9739-R2-EBZ > AD9739 SPI).
Connect a +5Vdc power supply to J17, and connect a 2GHz, 0dBm clock to J3.
Enable Mu Controller
In order to optimize and lock the Mu Controller, it is only necessary to have the DAC clock running (no data needs to be presented).
Click the MU_ENA button in the MU Controller section of the SPI application, as shown in Figure 2. Then run the SPI application by
clicking on the Run button ( ) in the upper left of the screen.
Figure 2
Load Pattern from the DPG2
Open DPGDownloader (Start > Programs > Analog Devices > DPG > DPGDownloader). Ensure that “AD9739” is selected in the
Evaluation Board drop-down list. For this evaluation board, “LVDS” is the only valid Port Configuration, and will be selected
automatically. The Data Clock Frequency display should read approximately 500MHz.
Figure 3
Click on Add Generated Waveform, and then Single Tone, as shown in Figure 3. A Single Tone panel will be added to the vector list. Start
by entering the Clock Frequency (2GHz in this case). You can enter 2G in the box. Next, enter 180MHz (180M) as the desired frequency
of the tone. The DAC Resolution should be set at 14 bits.
Figure 4
Quick Start Guide AD9739-R2-EBZ
Rev. A | Page 3 of 8
Figure 6
Next, in the lower portion of the screen, select “1: Single Tone” as the Data Vector. The other options can be left at their default.
Figure 5
After the DPG2 is correctly setup, click the Download button ( ) in the lower right, then the Play button ( ) to begin vector playback
into the AD9739.
Enable LVDS Controller
Once the pattern is loaded into the DPG2 and running, the final step is to enable the LVDS Controller. In the AD9739 SPI application,
enable the RCV_LOOP and RCV_ENA buttons. Click the Run button ( ). Once the run is complete, the RCVR LCK and RCVR TRX
ON indicators should be green, as shown in Figure 6.
Another way to verify that the controller is in the correct spot (and not on the edge) is to check the status of the
four status bits which sample the rising edge of the DCI at four different phases. DCI PHS1 should always be
high, and DCI PHS3 should always be low. The other bits will toggle as the LVDS controller searches for the
correct timing. The ideal case is shown in Figure 7. Increasing the value of the FINE_DEL_SKEW allows for a
wider search around the DCI edge, and should reduce the toggling on PHS0 and PHS2. This is usually required
when the DCI signal has a lot of jitter.
Figure 7
P1-P3P4-P6P7-P8

AD9739-R2-EBZ

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Manufacturer:
Analog Devices Inc.
Description:
Data Conversion IC Development Tools AD9739 EVAL BRD
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