LT3024
16
3024fa
APPLICATIONS INFORMATION
and its copper traces. Copper board stiffeners and plated
through-holes can also be used to spread the heat gener-
ated by power devices.
The following tables list thermal resistance for several
different board sizes and copper areas. All measurements
were taken in still air on 3/32" FR-4 board with one ounce
copper.
Table 1. FE Package, 16-Lead TSSOP
COPPER AREA
BOARD AREA
THERMAL RESISTANCE
(JUNCTION-TO-AMBIENT)TOPSIDE* BACKSIDE
2500mm
2
2500mm
2
2500mm
2
38°C/W
1000mm
2
2500mm
2
2500mm
2
43°C/W
225mm
2
2500mm
2
2500mm
2
48°C/W
100mm
2
2500mm
2
2500mm
2
60°C/W
*Device is mounted on topside.
Table 2. UE Package, 12-Lead DFN
COPPER AREA
BOARD AREA
THERMAL RESISTANCE
(JUNCTION-TO-AMBIENT)TOPSIDE* BACKSIDE
2500mm
2
2500mm
2
2500mm
2
40°C/W
1000mm
2
2500mm
2
2500mm
2
45°C/W
225mm
2
2500mm
2
2500mm
2
50°C/W
100mm
2
2500mm
2
2500mm
2
62°C/W
*Device is mounted on topside.
The thermal resistance junction-to-case (θ
JC
), measured
at the Exposed Pad on the back of the die is 10°C/W for
the DFN package and 8°C/W for the TSSOP package.
Calculating Junction Temperature
Example: Given Output 1 set for an output voltage of
3.3V, Output 2 set for an output voltage of 2.5V, an input
voltage range of 3.8V to 5V, an output current range of
0mA to 500mA for Output 1, an output current range of
0mA to 100mA for Output 2 and a maximum ambient
temperature of 50°C, what will the maximum junction
temperature be?
The power dissipated by each output will be equal to:
I
OUT(MAX)
(V
IN(MAX)
– V
OUT
) + I
GND
(V
IN(MAX)
)
Where for Output 1:
I
OUT(MAX)
= 500mA
V
IN(MAX)
= 5V
I
GND
at (I
OUT
= 500mA, V
IN
= 5V) = 9mA
For Output 2:
I
OUT(MAX)
= 100mA
V
IN(MAX)
= 5V
I
GND
at (I
OUT
= 100mA, V
IN
= 5V) = 2mA
So for Output 1:
P = 500mA (5V – 3.3V) + 9mA (5V) = 0.90W
For Output 2:
P = 100mA (5V – 2.5V) + 2mA (5V) = 0.26W
The thermal resistance will be in the range of 35°C/W to
55°C/W depending on the copper area. So the junction
temperature rise above ambient will be approximately
equal to:
(0.90W + 0.26W) 50°C/W = 57.8°C
The maximum junction temperature will then be equal to
the maximum junction temperature rise above ambient
plus the maximum ambient temperature or:
T
JMAX
= 50°C + 57.8°C = 107.8°C
Protection Features
The LT3024 regulator incorporates several protection fea-
tures which make it ideal for use in battery-powered circuits.
In addition to the normal protection features associated
with monolithic regulators, such as current limiting and
thermal limiting, the device is protected against reverse
input voltages, reverse output voltages and reverse voltages
from output to input. The two regulators have common
LT3024
17
3024fa
APPLICATIONS INFORMATION
V
IN
and GND pins and are thermally coupled, however, the
two outputs of the LT3024 operate independently. They
can be shut down independently and a fault condition on
one output will not affect the other output electrically.
Current limit protection and thermal overload protection
are intended to protect the device against current overload
conditions at the output of the device. For normal operation,
the junction temperature should not exceed 125°C.
The input of the device will withstand reverse voltages
of 20V. Current fl ow into the device will be limited to less
than 1mA (typically less than 100μA) and no negative
voltage will appear at the output. The device will protect
both itself and the load. This provides protection against
batteries which can be plugged in backward.
The output of the LT3024 can be pulled below ground
without damaging the device. If the input is left open circuit
or grounded, the output can be pulled below ground by
20V. The output will act like an open circuit; no current will
ow out of the pin. If the input is powered by a voltage
source, the output will source the short-circuit current of
the device and will protect itself by thermal limiting. In
this case, grounding the SHDN1/SHDN2 pins will turn off
the device and stop the output from sourcing the short-
circuit current.
The ADJ pins can be pulled above or below ground by as
much as 7V without damaging the device. If the input is
left open circuit or grounded, the ADJ pins will act like an
open circuit when pulled below ground and like a large
resistor (typically 100k) in series with a diode when pulled
above ground.
In situations where the ADJ pins are connected to a resistor
divider that would pull the pins above their 7V clamp volt-
age if the output is pulled high, the ADJ pin input current
must be limited to less than 5mA. For example, a resistor
divider is used to provide a regulated 1.5V output from the
Figure 7. Reverse Output Current
OUTPUT VOLTAGE (V)
100
90
80
70
60
50
40
30
20
10
0
REVERSE OUTPUT CURRENT (μA)
3024 F07
0123
4
5
678910
T
A
= 25°C
V
IN
= 0V
V
OUT
= V
ADJ
CURRENT FLOWS
INTO OUTPUT PIN
1.22V reference when the output is forced to 20V. The top
resistor of the resistor divider must be chosen to limit the
current into the ADJ pin to less than 5mA when the ADJ
pin is at 7V. The 13V difference between output and ADJ
pin divided by the 5mA maximum current into the ADJ pin
yields a minimum top resistor value of 2.6k.
In circuits where a backup battery is required, several
different input/output conditions can occur. The output
voltage may be held up while the input is either pulled
to ground, pulled to some intermediate voltage or is left
open circuit. Current fl ow back into the output will follow
the curve shown in Figure 7.
When the IN pin of the LT3024 is forced below either OUT
pin or either OUT pin is pulled above the IN pin, input cur-
rent for the corresponding regulator will typically drop to
less than 2μA. This can happen if the input of the device
is connected to a discharged (low voltage) battery and the
output is held up by either a backup battery or a second
regulator circuit. The state of the SHDN1/SHDN2 pin will
have no effect on the reverse output current when the
output is pulled above the input.
LT3024
18
3024fa
PACKAGE DESCRIPTION
4.00 ±0.10
(2 SIDES)
3.00 ±0.10
(2 SIDES)
NOTE:
1. DRAWING PROPOSED TO BE A VARIATION OF VERSION
(WGED) IN JEDEC PACKAGE OUTLINE M0-229
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
0.40 ± 0.10
BOTTOM VIEW—EXPOSED PAD
1.70 ± 0.10
0.75 ±0.05
R = 0.115
TYP
R = 0.05
TYP
2.50 REF
16
127
PIN 1 NOTCH
R = 0.20 OR
0.35 × 45°
CHAMFER
PIN 1
TOP MARK
(NOTE 6)
0.200 REF
0.00 – 0.05
(UE12/DE12) DFN 0806 REV D
2.50 REF
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
2.20 ±0.05
0.70 ±0.05
3.60 ±0.05
PACKAGE OUTLINE
3.30 ±0.10
0.25 ± 0.05
0.50 BSC
1.70 ± 0.05
3.30 ±0.05
0.50 BSC
0.25 ± 0.05
DE/UE Package
12-Lead Plastic DFN (4mm × 3mm)
(Reference LTC DWG # 05-08-1695 Rev D)

LT3024EFE#TRPBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
LDO Voltage Regulators Dual 500mA/100mA Low Dropout Regulator
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union