8
Figure 6. HFBR-2316T receiver test circuit.
Notes:
1. 2.0 mm from where leads enter case.
2. The signal output is referred to V
CC
, and does not reject noise from the V
CC
power supply. Consequently, the V
CC
power supply must be ltered.
The recommended power supply is +5 V on V
CC
for typical usage with +5 V ECL logic. A -5 V power supply on V
EE
is used for test purposes to
minimize power supply noise.
3. Typical speci cations are for operation at T
A
= 25° C and V
CC
= +5 V
DC
.
4. The test circuit layout should be in accordance with good high frequency circuit design techniques.
5. Measured with a 9-pole “brick wall” low-pass lter [Mini-Circuits
TM
, BLP-100*] with -3 dB bandwidth of 100 MHz.
6. -11.0 dBm is the maximum peak input optical power for which pulse-width distortion is less than 1 ns.
7. Electrical bandwidth is the frequency where the responsivity is -3 dB (electrical) below the responsivity measured at 50 MHz.
8. The speci ed rise and fall times are referenced to a fast square wave optical source. Rise and fall times measured using an LED optical source with
a 2.0 ns rise and fall time (such as the HFBR-1312T) will be approximately 0.6 ns longer than the speci ed rise and fall times.
E.g.: measured t
r,f
[(speci ed t
r,f
)
2
+ (test source optical t
r,f
)
2
]
1/2
.
9. 10 ns pulse width, 50% duty cycle, at the 50% amplitude point of the waveform.
10. Percent overshoot is de ned as: ((V
PK
- V
100%
)/V
100%
) x 100% . The overshoot is typically 2% with an input optical rise time ≤1.5 ns.
11. The bandwidth*risetime product is typically 0.41 because the HFBR-2316TZ has a second-order bandwidth limiting characteristic.
V
CC
= 0 V
6
V
O
2
3, 7
TEST
LOAD
d 5 pF
500:
100 pF 0.1 PF
V
EE
= -5 V
10:
500:
100 pF 0.1 PF
1 GHz FET PROBE
V
EE
= -5 V
HFBR-2316TZ
