PC Board Layout Considerations
Good PC board layout is required to achieve specified
noise, efficiency, and stable performance. The PC
board layout artist must be given explicit instructions,
preferably a pencil sketch showing the placement of
power-switching components and high-current routing.
Refer to the PC board layout in the MAX1667 evaluation
kit manual for examples. A ground plane is essential for
optimum performance. In most applications, the circuit
will be located on a multilayer board, and full use of the
four or more copper layers is recommended. Use the
top layer for high-current connections, the bottom layer
for quiet connections (REF, CCV, CCI, DACV, GND),
and the inner layers for an uninterrupted ground plane.
Use the following step-by-step guide:
1) Place the high-power components (C1, C6, M1, M2,
D1, L1, and R1) first, with their grounds adjacent:
• Minimize current-sense resistor trace lengths and
ensure accurate current sensing with Kelvin con-
nections (Figure 12).
• Minimize ground trace lengths in the high-current
paths.
• Minimize other trace lengths in the high-current
paths:
— Use > 5mm-wide traces.
— Connect CIN to high-side MOSFET drain: 10mm
max length.
— Connect rectifier diode cathode to low side.
— MOSFET: 5mm max length.
— LX node (MOSFETs, rectifier cathode, induc-
tor): 15mm max length.
Ideally, surface-mount power components are butted
up to one another with their ground terminals almost
touching. These high-current grounds are then con-
nected to each other with a wide, filled zone of
top-layer copper so they do not go through vias. The
resulting top-layer subground plane is connected to the
normal inner-layer ground plane at the output ground
terminals, which ensures that the IC’s analog ground is
sensing at the supply’s output terminals without interfer-
ence from IR drops and ground noise. Other high-cur-
rent paths should also be minimized, but focusing
primarily on short ground and current-sense connec-
tions eliminates about 90% of all PC board layout prob-
lems.
2) Place the IC and signal components. Keep the main
switching nodes (LX nodes) away from sensitive
analog components (current-sense traces and REF
capacitor). Place the IC and analog components on
the opposite side of the board from the power-
switching node. Important: The IC must be no fur-
ther than 10mm from the current-sense resistors.
Keep the gate-drive traces (DH, DL, and BST) short-
er than 20mm and route them away from CSH, CSL,
and REF. Place ceramic bypass capacitors close to
the IC. The bulk capacitors can be placed further
away.
3) Use a single-point star ground where the input
ground trace, power ground (subground plane), and
normal ground plane meet at the supply’s output
ground terminal. Connect both IC ground pins and
all IC bypass capacitors to the normal ground plane.
Upgrading from MAX1647 to MAX1667
The MAX1667 is a pin- and software-compatible
upgrade to the MAX1647, with the following functional
differences:
1) The PWM duty cycle has been extended to 97%.
2) The internal reference has been changed to
+4.096V with 1% accuracy over line, load, and tem-
perature.
3) The internal voltage DAC has been changed to allow
a program voltage of 18,416mV. Up to four Li+ cells
can be charged.
4) The linear current source (IOUT) has been reduced
to 7mA and turns off when the switching regulator is
on.
5) An internal diode has been added to the IOUT pin to
prevent reverse current from BATT when the DC
source is removed.
6) The internal current DAC was changed from 6-bit to
5-bit resolution.
MAX1667
Chemistry-Independent,
Level 2 Smart Battery Charger
24 ______________________________________________________________________________________
Figure 12. Kelvin Connections for the Current-Sense Resistors
