RT9041A/B
10
DS9041A/B-04 November 2014www.richtek.com
©
Copyright 2013 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.
Figure 2. Region of Stable C
OUT
ESR vs. Load Current
Thermal Considerations
For continuous operation, do not exceed absolute
maximum junction temperature. The maximum power
dissipation depends on the thermal resistance of the IC
package, PCB layout, rate of surrounding airflow, and
difference between junction and ambient temperature. The
maximum power dissipation can be calculated by the
following formula :
P
D(MAX)
= (T
J(MAX)
− T
A
) / θ
JA
where T
J(MAX)
is the maximum junction temperature, T
A
is
the ambient temperature, and θ
JA
is the junction to ambient
thermal resistance.
For recommended operating condition specifications, the
maximum junction temperature is 125°C. The junction to
ambient thermal resistance, θ
JA
, is layout dependent. For
SOT-23-6 packages, the thermal resistance, θ
JA
, is 250°C/
W on a standard JEDEC 51-3 single-layer thermal test
board. The maximum power dissipation at T
A
= 25°C can
be calculated by the following formula :
P
D(MAX)
= (125°C − 25°C) / (250°C/W) = 0.400W for
SOT-23-6 package
The maximum power dissipation depends on the operating
ambient temperature for fixed T
J(MAX)
and thermal
resistance, θ
JA
. The derating curve in Figure 3 allows the
designer to see the effect of rising ambient temperature
on the maximum power dissipation.
Figure 3. Derating Curve of Maximum Power Dissipation
0.00
0.05
0.10
0.15
0.20
0.25
0.30
0.35
0.40
0.45
0 25 50 75 100 125
Ambient Temperature (°C)
Maximum Power Dissipation (W)1
Four-Layer PCB
Region of Stable C
OUT
ESR vs. Load Current
0.001
0.010
0.100
1.000
10.000
100.000
0 100 200 300 400 500
Load Current (mA)
Region of Stable C
OUT
ESR (Ω)
(Ω)
V
DD
= 5V, V
IN
= 2.5V, V
OUT
= 1V,
C
VDD
= 0.1μF, C
IN
= C
OUT
= 10μF/X7R
Unstable Range
Stable Range
Simulation Verify
