LT3510
24
3510fe
Figure 11. Subtracting the Current when the Switch is On (11a) from the Current when the Switch is Off (11b) Reveals the Path of the
High Frequency Switching Current (11c). Keep this Loop Small. The Voltage on the SW and BST Traces will Also Be Switched; Keep
These Traces as Short as Possible. Finally, Make Sure the Circuit is Shielded with a Local Ground Plane
PCB Layout
For proper operation and minimum EMI, care must be taken
during printed circuit board (PCB) layout. Figure 11 shows
the high di/dt paths in the buck regulator circuit.
Note that large switched currents fl ow in the power switch,
the catch diode and the input capacitor. The loop formed
by these components should be as small as possible.
These components, along with the inductor and output
capacitor, should be placed on the same side of the circuit
board and their connections should be made on that layer.
Place a local, unbroken ground plane below these com-
ponents, and tie this ground plane to system ground at
one location, ideally at the ground terminal of the output
capacitor C2. Additionally, the SW and BST traces should
be kept as short as possible. The topside metal from the
DC964A demonstration board in Figure 12 illustrates proper
component placement and trace routing.
Thermal Considerations
The PCB must also provide heat sinking to keep the LT3510
cool. The exposed metal on the bottom of the package
must be soldered to a ground plane. This ground should
be tied to other copper layers below with thermal vias;
these layers will spread the heat dissipated by the LT3510.
Place additional vias near the catch diodes. Adding more
copper to the top and bottom layers and tying this copper
Figure 12. Topside PCB Layout
V
IN
GND
(11a)
LT3510
SW
V
IN
GND
(11c)
LT3510
SW
V
IN
GND
(11b)
LT3510
SW
3510 F11
APPLICATIONS INFORMATION
