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ADG5213BCPZ-RL7

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P20
High Voltage Latch-Up Proof,
Quad SPST Switches
Data Sheet
ADG5212/ADG5213
Rev. A Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2011–2015 Analog Devices, Inc. All rights reserved.
Technical Support www.analog.com
FEATURES
Latch-up proof
3 pF off source capacitance
5 pF off drain capacitance
0.07 pC charge injection
Low leakage: 0.2 nA maximum at 85ºC
±9 V to ±22 V dual-supply operation
9 V to 40 V single-supply operation
48 V supply maximum ratings
Fully specified at ±15 V, ±20 V, +12 V, and +36 V
V
SS
to V
DD
analog signal range
APPLICATIONS
Automatic test equipment
Data acquisition
Instrumentation
Avionics
Audio and video switching
Communication systems
FUNCTIONAL BLOCK DIAGRAMS
IN1
S1
D1
IN2
S2
D2
IN3
S3
D3
IN4
S4
D4
ADG5212
SWITCHES SHOWN FOR A LOGIC 1 INPUT.
IN2
S2
D2
IN3
S3
D3
IN1
S1
D1
IN4
S4
D4
ADG5213
09767-001
Figure 1.
GENERAL DESCRIPTION
The ADG5212/ADG5213 contain four independent single-
pole/single-throw (SPST) switches. The ADG5212 switches
turn on with Logic 1. The ADG5213 has two switches with
digital control logic similar to that of the ADG5212; however,
the logic is inverted on the other two switches. Each switch
conducts equally well in both directions when on, and each
switch has an input signal range that extends to the supplies.
In the off condition, signal levels up to the supplies are blocked.
The ADG5212 and ADG5213 do not have a V
L
pin. The digital
inputs are compatible with 3 V logic inputs over the full
operating supply range.
The ultralow capacitance and charge injection of these switches
make them ideal solutions for data acquisition and sample-and-
hold applications, where low glitch and fast settling are required.
Fast switching speed together with high signal bandwidth make
the parts suitable for video signal switching.
PRODUCT HIGHLIGHTS
1. Trench Isolation Guards Against Latch-Up.
A dielectric trench separates the P and N channel transistors,
thereby preventing latch-up even under severe overvoltage
conditions.
2. Ultralow Capacitance and <1 pC Charge Injection.
3. Dual-Supply Operation.
For applications where the analog signal is bipolar, the
ADG5212/ADG5213 can be operated from dual supplies of
up to ±22 V.
4. Single-Supply Operation.
For applications where the analog signal is unipolar, the
ADG5212/ADG5213 can be operated from a single rail
power supply of up to 40 V.
5. 3 V Logic-Compatible Digital Inputs.
V
INH
= 2.0 V, V
INL
= 0.8 V.
6. No V
L
Logic Power Supply Required.
ADG5212/ADG5213 Data Sheet
Rev. A | Page 2 of 20
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Functional Block Diagrams ............................................................. 1
General Description ......................................................................... 1
Product Highlights ........................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
±15 V Dual Supply ....................................................................... 3
±20 V Dual Supply ....................................................................... 4
12 V Single Supply ........................................................................ 5
36 V Single Supply ........................................................................ 6
Continuous Current per Channel, Sx or Dx ..............................7
Absolute Maximum Ratings ............................................................8
ESD Caution...................................................................................8
Pin Configurations and Function Descriptions ............................9
Typical Performance Characteristics ........................................... 10
Test Circuits ..................................................................................... 14
Terminology .................................................................................... 16
Trench Isolation .............................................................................. 17
Applications Information .............................................................. 18
Outline Dimensions ....................................................................... 19
Ordering Guide .......................................................................... 19
REVISION HISTORY
9/15—Rev. 0 to Rev. A
Changed Off Isolation Parameter from −105 dB Typical at 25°C
to −80 dB Typical at 25°C ............................................. Throughout
Change to Applications Information Section ............................. 18
Change to Figure 34 Caption ........................................................ 19
Changes to Ordering Guide .......................................................... 19
4/11—Revision 0: Initial Version
Data Sheet ADG5212/ADG5213
Rev. A | Page 3 of 20
SPECIFICATIONS
±15 V DUAL SUPPLY
V
DD
= +15 V ± 10%, V
SS
= −15 V ± 10%, GND = 0 V, unless otherwise noted.
Table 1.
Parameter 25°C −40°C to +85°C −40°C to +125°C Unit Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range
DD
SS
V max
On Resistance, R
ON
160 Ω typ V
S
= ±10 V, I
S
= −1 mA,
see Figure 24
200
250
Ω max
V
DD
= +13.5 V, V
SS
= −13.5 V
On-Resistance Match Between Channels, ∆R
ON
2 Ω typ V
S
= ±10 V, I
S
= −1 mA
8
9
Ω max
On-Resistance Flatness, R
FLAT(ON)
38 Ω typ V
S
= ±10 V, I
S
= −1 mA
50
65
Ω max
LEAKAGE CURRENTS V
DD
= +16.5 V, V
SS
= −16.5 V
Source Off Leakage, I
S
(Off) 0.01 nA typ
V
S
= ±10 V, V
D
= ∓10 V,
see Figure 23
0.1 0.2 0.4 nA max
Drain Off Leakage, I
D
(Off)
0.01
nA typ
V
S
= ±10 V, V
D
= ∓10 V,
see Figure 23
0.1 0.2 0.4 nA max
Channel On Leakage, I
D
(On), I
S
(On) 0.02 nA typ V
S
= V
D
= ±10 V, see Figure 26
0.2
0.25
nA max
DIGITAL INPUTS
Input High Voltage, V
INH
2.0 V min
Input Low Voltage, V
INL
V max
Input Current, I
INL
or I
INH
0.002 µA typ V
IN
= V
GND
or V
DD
±0.1 µA max
Digital Input Capacitance, C
IN
3 pF typ
DYNAMIC CHARACTERISTICS
1
t
ON
175 ns typ R
L
= 300 Ω, C
L
= 35 pF
210 255 280 ns max V
S
= 10 V, see Figure 30
t
OFF
140
ns typ
R
L
= 300 Ω, C
L
= 35 pF
170 195 215 ns max V
S
= 10 V, see Figure 30
Break-Before-Make Time Delay, t
D
(ADG5213 Only)
40 ns typ R
L
= 300 Ω, C
L
= 35 pF
20 ns min V
S1
= V
S2
= 10 V, see Figure 29
Charge Injection, Q
INJ
0.07 pC typ V
S
= 0 V, R
S
= 0 Ω, C
L
= 1 nF,
see Figure 31
Off Isolation −80 dB typ R
L
= 50 Ω, C
L
= 5 pF, f = 1 MHz,
see Figure 25
Channel-to-Channel Crosstalk
−105
dB typ
R
L
= 50 Ω, C
L
= 5 pF, f = 1 MHz,
see Figure 27
−3 dB Bandwidth
435
MHz typ
R
L
= 50 Ω, C
L
= 5 pF, see Figure 28
Insertion Loss
−6.8
dB typ
R
L
= 50 Ω, C
L
= 5 pF, f = 1 MHz,
see Figure 28
C
S
(Off)
3
pF typ
V
S
= 0 V, f = 1 MHz
C
D
(Off)
5
pF typ
V
S
= 0 V, f = 1 MHz
C
D
(On), C
S
(On) 8 pF typ V
S
= 0 V, f = 1 MHz
POWER REQUIREMENTS
V
DD
= +16.5 V, V
SS
= −16.5 V
I
DD
45 µA typ Digital inputs = 0 V or V
DD
55 70 µA max
I
SS
0.001 µA typ Digital inputs = 0 V or V
DD
µA max
V
DD
/V
SS
±9/±22 V min/V max GND = 0 V
1
Guaranteed by design; not subject to production test.
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P20

ADG5213BCPZ-RL7

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Manufacturer:
Analog Devices Inc.
Description:
Analog Switch ICs High VTG Latch-Up Proof Quad SPST
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