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AT94FR40161
6040B–ATARM–03/04
Architectural
Overview
The AT91FR40161 integrates Atmel’s AT91R40807 ARM Thumb processor and an
AT49BV1604A/1614A 2 Mbyte (16 Mbit) Flash memory die in a single compact 120-ball
BGA device. The address, data and control signals, except the Flash memory enable
and Flash reset, are internally interconnected.
The AT91R40807 architecture consists of two main buses, the Advanced System Bus
(ASB) and the Advanced Peripheral Bus (APB). Designed for maximum performance
and controlled by the memory controller, the ASB interfaces the ARM7TDMI processor
with the on-chip 32-bit memories, the External Bus Interface (EBI) and the AMBA
™
Bridge. The AMBA Bridge drives the APB, designed for access to on-chip peripherals
and optimized for low power consumption.
The AT91FR40161 implements the ICE port of the ARM7TDMI processor on dedicated
pins, offering a complete, low-cost and easy-to-use debug solution for target debugging.
Memories
The AT91FR40161 embeds 136 Kbytes of internal SRAM. The internal memory is
directly connected to the 32-bit data bus and is single-cycle accessible. This provides
maximum performance of 30 MIPS at 33 MHz by using the ARM instruction set of the
processor, minimizing system power consumption and improving on the performance of
separate memory solutions.
The AT91FR40161 features an External Bus Interface (EBI), which enables connection
of external memories and application-specific peripherals. The EBI supports 8- or 16-bit
devices and can use two 8-bit devices to emulate a single 16-bit device. The EBI imple-
ments the early read protocol, enabling faster memory access than standard memory
interfaces.
The AT91FR40161 embeds a Flash memory organized as 1024K 16-bit words,
accessed via the EBI. Its main function is program memory. A 16-bit Thumb instruction
can be loaded from Flash memory in a single access. Separate MCU and Flash memory
reset inputs (NRST and NRSTF) are provided for maximum flexibility. The user is thus
free to tailor the reset operation to the application.
The AT91FR40161 integrates resident boot software called AT91 Flash Uploader soft-
ware in the embedded Flash. The AT91 Flash Uploader software is able to upload
program application software into its Flash memory.
Peripherals
The AT91FR40161 integrates several peripherals that are classified as system or user
peripherals.
All on-chip peripherals are 32-bit accessible by the AMBA Bridge, and can be pro-
grammed with a minimum number of instructions. The peripheral register set is
composed of control, mode, data, status and enable/disable/status registers.
An on-chip Peripheral Data Controller (PDC) transfers data between the on-chip
USARTs and on- and off-chip memory address spaces without processor intervention.
Most importantly, the PDC removes the processor interrupt handling overhead, making
it possible to transfer up to 64K contiguous bytes without reprogramming the start
address, thus increasing the performance of the microcontroller and reducing the power
consumption.
System Peripherals
The External Bus Interface (EBI) controls the external memory or peripheral devices via
an 8- or 16-bit data bus and is programmed through the APB. Each chip select line has
its own programming register.
