MC100LVE210FN

MC100LVE210
http://onsemi.com
4
Table 4. LVPECL DC CHARACTERISTICS V
CC
= 3.3 V; V
EE
= 0.0 V (Note 2)
−40°C 25°C 85°C
Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Unit
I
EE
Power Supply Current 55 55 65 mA
V
OH
Output HIGH Voltage (Note 3) 2215 2295 2420 2275 2345 2420 2275 2345 2420 mV
V
OL
Output LOW Voltage (Note 3) 1470 1605 1745 1490 1595 1680 1490 1595 1680 mV
V
IH
Input HIGH Voltage (Single−Ended) 2135 2420 2135 2420 2135 2420 mV
V
IL
Input LOW Voltage (Single−Ended) 1490 1825 1490 1825 1490 1825 mV
V
BB
Output Voltage Reference 1.92 2.04 1.92 2.04 1.92 2.04 V
V
IHCMR
Input HIGH Voltage Common Mode
Range (Differential) (Note 7)
1.8 2.9 1.8 2.9 1.8 2.9 V
I
IH
Input HIGH Current 150 150 150
mA
I
IL
Input LOW Current 0.5 0.5 0.5
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
2. Input and output parameters vary 1:1 with V
CC
. V
EE
can vary ±0.3 V.
3. Outputs are terminated through a 50 W resistor to V
CC
− 2.0 V.
4. V
IHCMR
min varies 1:1 with V
EE
, max varies 1:1 with V
CC
. V
IHCMR
is defined as the range within which the V
IH
level may vary, with the device
still meeting the propagation delay specification. The V
IL
level must be such that the peak to peak voltage is less than 1.0 V and greater than
or equal to V
PP
(min).
Table 5. LVNECL DC CHARACTERISTICS V
CC
= 0.0 V; V
EE
= −3.3 V (Note 5)
−40°C 25°C 85°C
Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Unit
I
EE
Power Supply Current 55 55 65 mA
V
OH
Output HIGH Voltage (Note 6) −1085 −1005 −880 −1025 −955 −880 −1025 955 −880 mV
V
OL
Output LOW Voltage (Note 6) 1830 −1695 1555 1810 1705 1620 −1810 1705 −1620 mV
V
IH
Input HIGH Voltage (Single−Ended) −1165 −880 1165 −880 1165 −880 mV
V
IL
Input LOW Voltage (Single−Ended) −1810 −1475 −1810 −1475 −1810 −1475 mV
V
BB
Output Voltage Reference −1.38 −1.26 −1.38 −1.26 −1.38 −1.26 V
V
IHCMR
Input HIGH Voltage Common Mode
Range (Differential) (Note 7)
−1.5 −0.4 −1.5 −0.4 −1.5 −0.4 V
I
IH
Input HIGH Current 150 150 150
mA
I
IL
Input LOW Current 0.5 0.5 0.5
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
5. Input and output parameters vary 1:1 with V
CC
. V
EE
can vary ±0.3 V.
6. Outputs are terminated through a 50 W resistor to V
CC
− 2.0 V.
7. V
IHCMR
min varies 1:1 with V
EE
, max varies 1:1 with V
CC
. V
IHCMR
is defined as the range within which the V
IH
level may vary, with the device
still meeting the propagation delay specification. The V
IL
level must be such that the peak to peak voltage is less than 1.0 V and greater than
or equal to V
PP
(min).
MC100LVE210
http://onsemi.com
5
Table 6. AC CHARACTERISTICS V
CC
= 3.3 V; V
EE
= 0.0 V or V
CC
= 0.0 V; V
EE
= −3.3 V (Note 8)
−40°C 25°C 85°C
Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Unit
f
max
Maximum Toggle Frequency 700 700 700 GHz
t
PLH
t
PHL
Propagation Delay to Output
IN (Differential) (Note 9)
IN (Single−Ended) (Note 10)
475
400
875
850
500
450
900
900
500
450
900
900
ps
t
skew
Within−Device Skew (Note 11) Qa to Qb
Qa to Qa, Qb to Qb
Part−to−Part Skew (Diff)
50
50
75
75
200
50
30
75
50
200
50
30
75
50
200
ps
t
JITTER
Cycle−to−Cycle Jitter < 1 < 1 < 1 ps
V
PP
Input Swing (Note 12) 500 1000 500 1000 500 1000 mV
t
r
/t
f
Output Rise/Fall Time (20%−80%) 200 600 200 600 200 600 ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
8. V
EE
can vary ±0.3 V.
9. The differential propagation delay is defined as the delay from the crossing points of the differential input signals to the crossing point of the
differential output signals.
10.The single−ended propagation delay is defined as the delay from the 50% point of the input signal to the crossing point of the differential output
signals.
11. The within−device skew is defined as the worst case difference between any two similar delay paths within a single device.
12.V
PP
(min) is defined as the minimum input differential voltage which will cause no increase in the propagation delay. The V
PP
(min) is AC limited
for the LVE210 as a differential input as low as 50 mV will still produce full ECL levels at the output.
MC100LVE210
http://onsemi.com
6
Figure 3. Typical Termination for Output Driver and Device Evaluation
(See Application Note AND8020/D − Termination of ECL Logic Devices.)
Driver
Device
Receiver
Device
QD
Q D
Z
o
= 50 W
Z
o
= 50 W
50 W 50 W
V
TT
V
TT
= V
CC
− 2.0 V
ORDERING INFORMATION
Device Package Shipping
MC100LVE210FN PLCC−28 37 Units / Rail
MC100LVE210FNG PLCC−28
(Pb−Free)
37 Units / Rail
MC100LVE210FNR2 PLCC−28 500 Tape & Reel
MC100LVE210FNR2G PLCC−28
(Pb−Free)
500 Tape & Reel
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
Resource Reference of Application Notes
AN1405/D ECL Clock Distribution Techniques
AN1406/D Designing with PECL (ECL at +5.0 V)
AN1503/D
ECLinPSt I/O SPiCE Modeling Kit
AN1504/D Metastability and the ECLinPS Family
AN1568/D Interfacing Between LVDS and ECL
AN1672/D The ECL Translator Guide
AND8001/D Odd Number Counters Design
AND8002/D Marking and Date Codes
AND8020/D Termination of ECL Logic Devices
AND8066/D Interfacing with ECLinPS
AND8090/D AC Characteristics of ECL Devices

MC100LVE210FN

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
IC CLK BUF 1:4/1:5 700GHZ 28PLCC
Lifecycle:
New from this manufacturer.
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