OMO ElectronicOMO Electronic
Expand menu
Hello, Sign inMy Account
0 Cart

IDT5T9820NLGI8

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36
10
INDUSTRIAL TEMPERATURE RANGE
IDT5T9820
EEPROM PROGRAMMABLE 2.5V ZERO DELAY PLL CLOCK DRIVER
POWER SUPPLY CHARACTERISTICS FOR HSTL OUTPUTS
(1)
Symbol Parameter Test Conditions
(2)
Typ. Max Unit
I
DDQ Quiescent VDD Power Supply Current
(3)
VDDQN = Max., REF = LOW, PD = HIGH, nSOE = LOW, 112 150 mA
PLL_EN = HIGH, Outputs enabled, All outputs unloaded
I
DDQQ Quiescent VDDQN Power Supply Current
(3)
VDDQN = Max., REF = LOW, PD = HIGH, nSOE = LOW, 3 75 µA
PLL_EN = HIGH, Outputs enabled, All outputs unloaded
IDDPD Power Down Current VDD = Max., PD = LOW, nSOE = LOW, PLL_EN = HIGH 0.7 3 mA
I
DDD Dynamic VDD Power Supply VDD = Max., VDDQN = Max., CL = 0pF 22 30 µA/MHz
Current per Output
I
DDDQ Dynamic VDDQN Power Supply VDD = Max., VDDQN = Max., CL = 0pF 18 30 µA/MHz
Current per Output
I
TOT Total Power VDD Supply Current
(4,5)
VDDQN = 1.5V, FVCO = 100MHz, CL = 15pF 280 400 mA
VDDQN = 1.5V, FVCO = 250MHz, CL = 15pF 320 450
I
TOTQ Total Power VDDQN Supply Current
(4,5)
VDDQN = 1.5V, FVCO = 100MHz, CL = 15pF 130 200 mA
V
DDQN = 1.5V, FVCO = 250MHz, CL = 15pF 225 330
NOTES:
1. These power consumption characteristics are for all the valid input interfaces and cover the worst case input and output interface combinations.
2. The termination resistors are excluded from these measurements.
3. If the differential input interface is used, the true input is held LOW and the complementary input is held HIGH.
4. Bit 60 = 1.
5. All outputs are at the same interface level.
DIFFERENTIAL INPUT AC TEST CONDITIONS FOR HSTL
Symbol Parameter Value Units
VDIF Input Signal Swing
(1)
1V
VX Differential Input Signal Crossing Point
(2)
750 mV
VTHI Input Timing Measurement Reference Level
(3)
Crossing Point V
t
R, tF Input Signal Edge Rate
(4)
1 V/ns
NOTES:
1. The 1V peak-to-peak input pulse level is specified to allow consistent, repeatable results in an automatic test equipment (ATE) environment. This device meets the VDIF (AC)
specification under actual use conditions.
2. A 750mV crossing point level is specified to allow consistent, repeatable results in an automatic test equipment (ATE) environment. This device meets the VX specification under
actual use conditions.
3. In all cases, input waveform timing is marked at the differential cross-point of the input signals.
4. The input signal edge rate of 1V/ns or greater is to be maintained in the 20% to 80% range of the input waveform.
11
INDUSTRIAL TEMPERATURE RANGE
IDT5T9820
EEPROM PROGRAMMABLE 2.5V ZERO DELAY PLL CLOCK DRIVER
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE FOR eHSTL
(1)
Symbol Parameter Test Conditions Min. Typ.
(7)
Max Unit
Input Characteristics
IIH Input HIGH Current VDD = 2.7V VI = VDDQN/GND — — ±5 µA
IIL Input LOW Current VDD = 2.7V VI = GND/VDDQN ——±5
VIK Clamp Diode Voltage VDD = 2.3V, IIN = -18mA — - 0.7 - 1.2 V
VIN DC Input Voltage - 0.3 +3.6 V
VDIF DC Differential Voltage
(2,8)
0.2 — V
VCM DC Common Mode Input Voltage
(3,8)
800 900 1000 mV
VIH DC Input HIGH
(4,5,8)
VREF + 100 — mV
VIL DC Input LOW
(4,6,8)
—VREF - 100 mV
V
REF Single-Ended Reference Voltage
(4,8)
— 900 — mV
Output Characteristics
V
OH Output HIGH Voltage IOH = -8mA VDDQN - 0.4 — V
IOH = -100µAVDDQN - 0.1 — V
V
OL Output LOW Voltage IOL = 8mA — 0.4 V
IOL = 100µA — 0.1 V
V
OX FB/FB Output Crossing Point VDDQN/2 - 150 VDDQN/2 VDDQN/2 + 150 mV
NOTES:
1. See RECOMMENDED OPERATING RANGE table.
2. VDIF specifies the minimum input differential voltage (VTR - VCP) required for switching where VTR is the "true" input level and VCP is the "complement" input level. Differential mode
only. The DC differential voltage must be maintained to guarantee retaining the existing HIGH or LOW input. The AC differential voltage must be achieved to guarantee switching
to a new state.
3. VCM specifies the maximum allowable range of (VTR + VCP) /2. Differential mode only.
4. For single-ended operation, in a differential mode, REF[1:0]/VREF[1:0] is tied to the DC voltage VREF[1:0].
5. Voltage required to maintain a logic HIGH, single-ended operation in differential mode.
6. Voltage required to maintain a logic LOW, single-ended operation in differential mode.
7. Typical values are at VDD = 2.5V, VDDQN = 1.8V, +25°C ambient.
8. The reference clock input is capable of HSTL, eHSTL, LVEPECL, 1.8V or 2.5V LVTTL operation independent of the device output. (See Input/Output Selection table.)
12
INDUSTRIAL TEMPERATURE RANGE
IDT5T9820
EEPROM PROGRAMMABLE 2.5V ZERO DELAY PLL CLOCK DRIVER
DIFFERENTIAL INPUT AC TEST CONDITIONS FOR eHSTL
Symbol Parameter Value Units
VDIF Input Signal Swing
(1)
1V
VX Differential Input Signal Crossing Point
(2)
900 mV
VTHI Input Timing Measurement Reference Level
(3)
Crossing Point V
tR, tF Input Signal Edge Rate
(4)
1 V/ns
NOTES:
1. The 1V peak-to-peak input pulse level is specified to allow consistent, repeatable results in an automatic test equipment (ATE) environment. This device meets the VDIF (AC)
specification under actual use conditions.
2. A 900mV crossing point level is specified to allow consistent, repeatable results in an automatic test equipment (ATE) environment. This device meets the VX specification under
actual use conditions.
3. In all cases, input waveform timing is marked at the differential cross-point of the input signals.
4. The input signal edge rate of 1V/ns or greater is to be maintained in the 20% to 80% range of the input waveform.
POWER SUPPLY CHARACTERISTICS FOR eHSTL OUTPUTS
(1)
Symbol Parameter Test Conditions
(2)
Typ. Max Unit
I
DDQ Quiescent VDD Power Supply Current
(3)
VDDQN = Max., REF = LOW, PD = HIGH, nSOE = LOW, 112 150 mA
PLL_EN = HIGH, Outputs enabled, All outputs unloaded
I
DDQQ Quiescent VDDQN Power Supply Current
(3)
VDDQN = Max., REF = LOW, PD = HIGH, nSOE = LOW, 3 75 µA
PLL_EN = HIGH, Outputs enabled, All outputs unloaded
IDDPD Power Down Current VDD = Max., PD = LOW, nSOE = LOW, PLL_EN = HIGH 0.7 3 mA
I
DDD Dynamic VDD Power Supply VDD = Max., VDDQN = Max., CL = 0pF 22 30 µA/MHz
Current per Output
I
DDDQ Dynamic VDDQN Power Supply VDD = Max., VDDQN = Max., CL = 0pF 22 30 µA/MHz
Current per Output
I
TOT Total Power VDD Supply Current
(4,5)
VDDQN = 1.8V, FVCO = 100MHz, CL = 15pF 280 400 mA
VDDQN = 1.8V, FVCO = 250MHz, CL = 15pF 320 450
I
TOTQ Total Power VDDQN Supply Current
(4,5)
VDDQN = 1.8V, FVCO = 100MHz, CL = 15pF 160 250 mA
V
DDQN = 1.8V, FVCO = 250MHz, CL = 15pF 280 400
NOTES:
1. These power consumption characteristics are for all the valid input interfaces and cover the worst case input and output interface combinations.
2. The termination resistors are excluded from these measurements.
3. If the differential input interface is used, the true input is held LOW and the complementary input is held HIGH.
4. Bit 60 = 1.
5. All outputs are at the same interface level.
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36

IDT5T9820NLGI8

Mfr. #:
Buy IDT5T9820NLGI8
Manufacturer:
Description:
IC CLK DRIVER ZD PLL 68-VFQFPN
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet