LTC1702IGN#TRPBF Datasheet LTC1702CGN#TRPBF, LTC1702IGN#TRPBF, LTC1702IGN#PBF | P22-P24

LTC1702

1702fa

Applications that require optimized transient response will

need to recalculate the compensation values specifically

for the circuit in question. The underlying mathematics are

complex, but the component values can be calculated in a

straightforward manner if we know the gain and phase of

the modulator at the crossover frequency.

Modulator gain and phase can be measured directly from

a breadboard, or can be simulated if the appropriate

parasitic values are known. Measurement will give more

accurate results, but simulation can often get close enough

to give a working system. To measure the modulator gain

and phase directly, wire up a breadboard with an LTC1702

and the actual MOSFETs, inductor, and input and output

capacitors that the final design will use. This breadboard

should use appropriate construction techniques for high

speed analog circuitry: bypass capacitors located close to

the LTC1702, no long wires connecting components,

appropriately sized ground returns, etc. Wire the feedback

amplifier as a simple type 1 loop, with a 10k resistor from

OUT

to FB and a 0.1µF feedback capacitor from COMP to

FB. Choose the bias resistor (R

) as required to set the

desired output voltage. Disconnect R

from ground and

connect it to a signal generator or to the source output of

a network analyzer (Figure 12) to inject a test signal into

the loop. Measure the gain and phase from the COMP pin

to the output node at the positive terminal of the output

capacitor. Make sure the analyzer’s input is AC coupled so

that the DC voltages present at both the COMP and V

OUT

“Type 3” loops (Figure 11) use two poles and two zeros to

obtain a 180° phase boost in the middle of the frequency

band. A properly designed type 3 circuit can maintain

acceptable loop stability even when low output capacitor

ESR causes the LC section to approach 180° phase shift

well above the initial LC roll-off. As with a type 2 circuit, the

loop should cross through 0dB in the middle of the phase

bump to maximize phase margin. Many LTC1702 circuits

using low ESR tantalum or OS-CON output capacitors

need type 3 compensation to obtain acceptable phase

margin with a high bandwidth feedback loop.

APPLICATIONS INFORMATION

WUU

OUT

1702 F11a

REF

–

GAIN

(dB)

PHASE

(DEG)

1702 F11b

–90

–180

–270

+6dB/OCT

–6dB/OCT

PHASE

GAIN

–6dB/OCT

Figure 11a. Type 3 Amplifier Schematic Diagram

Figure 11B. Type 3 Amplifier Transfer Function

BOOST2

FCB

FAULT

COMP

RUN/SS

1/2 LTC1702

10Ω MBR0530T

1µF

OUT

ANALYZER

COMP

ANALYZER

SOURCE

FROM

ANALYZER

EXT

10µF

0.1µF

SGND

PGND

10k

OUT

1702 F12

Figure 12. Modulator Gain/Phase Measurement Set-Up

Feedback Component Selection

Selecting the R and C values for a typical type 2 or type 3

loop is a nontrivial task. The applications shown in this data

sheet show typical values, optimized for the power com-

ponents shown. They should give acceptable performance

with similar power components, but can be way off if even

one major power component is changed significantly.

LTC1702

1702fa

Finally, choose a convenient resistor value for R1 (10k is

usually a good value). Now calculate the remaining values:

(K is a constant used in the calculations)

ƒ = chosen crossover frequency

G = 10

(GAIN/20)

(this converts GAIN in dB to G in absolute

gain)

Type 2 Loop:

K Tan

BOOST

GKR

CCK

REF

OUT REF

=+°

⎛

⎝

⎜

⎞

⎠

⎟

πƒ

()

πƒ

()

12 1

–

Type 3 Loop:

K Tan

BOOST

CCK

REF

OUT REF

=+°

⎛

⎝

⎜

⎞

⎠

⎟

πƒ

()

πƒ

()

πƒ

()

12 1

–

APPLICATIONS INFORMATION

WUU

nodes don’t corrupt the measurements or damage the

analyzer.

If breadboard measurement is not practical, a SPICE

simulation can be used to generate approximate gain/

phase curves. Plug the expected capacitor, inductor and

MOSFET values into the following SPICE deck and gener-

ate an AC plot of V(V

OUT

)/V(COMP) in dB and phase of

V(OUT) in degrees. Refer to your SPICE manual for details

of how to generate this plot.

*1702 modulator gain/phase

1999 Linear Technology

*this file written to run with PSpice 8.0

*may require modifications for other SPICE

simulators

*MOSFETs

rfet mod sw 0.02 ;MOSFET rdson

*inductor

lext sw out1 1u ;inductor value

rl out1 out 0.005 ;inductor series R

*output cap

cout out out2 1000u ;capacitor value

resr out2 0 0.01 ;capacitor ESR

*1702 internals

emod mod 0 comp 0 5 ;3.3 for 3.3V supply

vstim comp 0 0 ac 1 ;ac stimulus

.ac dec 100 1k 1meg

.probe

.end

With the gain/phase plot in hand, a loop crossover fre-

quency can be chosen. Usually the curves look something

like Figure 8. Choose the crossover frequency in the rising

or flat parts of the phase curve, beyond the external LC

poles. Frequencies between 10kHz and 50kHz usually

work well. Note the gain (GAIN, in dB) and phase (PHASE,

in degrees) at this point. The desired feedback amplifier

gain will be –GAIN to make the loop gain 0dB at this

frequency. Now calculate the needed phase boost, assum-

ing 60° as a target phase margin:

BOOST = –(PHASE + 30°)

If the required BOOST is less than 60°, a type 2 loop can

be used successfully, saving two external components.

BOOST values greater than 60° usually require type 3

loops for satisfactory performance.

LTC1702

1702fa

Accuracy Trade-Offs

The V

sensing scheme used in the LTC1702 is not

particularly accurate, primarily due to uncertainty in the

DS(ON)

from MOSFET to MOSFET. A second error term

arises from the ringing present at the SW pin, which

causes the V

to look larger than (I

LOAD

)(R

DS(ON)

) at the

beginning of QB’s on-time. These inaccuracies do not

prevent the LTC1702 current limit circuit from protecting

itself and the load from damaging overcurrent conditions,

but they do prevent the user from setting the current limit

to a tight tolerance if more than one copy of the circuit is

being built. The 50% factor in the current setting equation

above reflects the margin necessary to ensure that the

circuit will stay out of current limit at the maximum normal

load, even with a hot MOSFET that is running quite a bit

higher than its R

DS(ON)

spec.

FCB OPERATION/SECONDARY WINDINGS

The FCB pin can be used in conjunction with a secondary

winding on one side of the LTC1702 to generate a third

regulated voltage output. This output can be directly

regulated at the FCB pin. In theory, a fourth output could

be added, either unregulated or with additional external

circuitry at the FCB pin.

The extra auxiliary output is taken from a second winding

on the core of the inductor on one channel, converting it

into a transformer (Figure 13). The auxiliary output voltage

is set by the main output voltage and the turns ratio of the

extra winding to the primary winding. Load regulation at

the auxiliary output will be relatively good as long as the

main output is running in continuous mode. As the load on

the main channel drops and the LTC1702 switches to

discontinuous or Burst Mode operation, the auxiliary

output will not be able to maintain regulation, especially if

the load at the auxiliary output remains heavy.

To avoid this, the auxiliary output voltage can be divided

down with a conventional feedback resistor string with the

divided auxiliary output voltage fed back to the FCB pin

(Figure 13). The FCB pin threshold is trimmed to 800mV

APPLICATIONS INFORMATION

WUU

CURRENT LIMIT PROGRAMMING

Programming the current limit on the LTC1702 is straight-

forward. The I

MAX

pin sets the current limit by setting the

maximum allowable voltage drop across QB (the bottom

MOSFET) before the current limit circuit engages. The

voltage across QB is set by its on-resistance and the

current flowing in the inductor, which is the same as the

output current. The LTC1702 current limit circuit inverts

the voltage at I

MAX

before comparing it with the negative

voltage across QB, allowing the current limit to be set with

a positive voltage.

To set the current limit, calculate the expected voltage drop

across QB at the maximum desired current:

VIR CF

PROG ILIM DS ON

()

LIM

should be chosen to be quite a bit higher than the

expected operating current, to allow for MOSFET R

DS(ON)

changes with temperature. Setting I

LIM

to 150% of the

maximum normal operating current is usually safe and will

adequately protect the power components if they are

chosen properly. The CF term is an approximate factor that

corrects for errors caused by ringing on the switch node

(illustrated in Figure 6). This correction factor will change

depending on the layout and the components used, but

100mV is usually a good starting point. To provide ad-

equate margin and to accommodate for offsets and exter-

nal variations, it is recommended that V

PROG

be calculated

with CF = 100 ± 50mV.

PROG

is then programmed at the I

MAX

pin using the

internal 10µA pull-up and an external resistor:

ILIM

= V

PROG

/10µA

The resulting value of R

ILIM

should be checked in an actual

circuit to ensure that the I

LIM

circuit kicks in as expected.

MOSFET R

DS(ON)

specs are like horsepower ratings in

automobiles, and should be taken with a grain of salt.

Circuits that use very low values for R

IMAX

(<20k) should

be checked carefully, since small changes in R

IMAX

can

cause large I

LIM

changes when the 100mV correction

factor makes up a large percentage of the total V

PROG

value. If V

PROG

is set too low, the LTC1702 may fail to

start up.

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Switching Voltage Regulators 2x 550kHz Sync 2-PhSw Reg Cntr

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