CS230002-CZZR

Copyright © Cirrus Logic, Inc. 2008
(All Rights Reserved)
http://www.cirrus.com
Advance Product Information
This document contains information for a new product.
Cirrus Logic reserves the right to modify this product without notice.
1x, 2x, 4x, and 8x Clock Multiplier with Internal LCO
Features
Clock Multiplier / Jitter Reduction
Generates a Low Jitter 6 - 75 MHz Clock
from a Jittery 750 kHz to 30 MHz Clock
Source
Internal LCO Reference Clock
128 Hz Loop Filter Bandwidth
Selectable Multiplication Factors
1x, 2x, 4x, and 8x
Output Enable Pin
Lock Indicator
Minimal Board Space Required
No External Analog Loop-filter
Components
General Description
The CS2300-02 is an extremely versatile system clock-
ing device that utilizes a programmable phase lock loop.
The CS2300-02 is based on a hybrid analog-digital PLL
architecture comprised of a unique combination of a
Delta-Sigma Fractional-N Frequency Synthesizer and a
Digital PLL. This architecture allows for generation of a
low-jitter clock relative to an external noisy synchroniza-
tion clock with frequencies as low as 750 kHz. The
CS2300-02 is a CS2300-OTP device that has been pre-
configured at the factory. There are three hardware con-
figuration pins available for mode and feature selection.
Ordering Information
The CS2300-02 is available in a 10-pin MSOP package
in Commercial (-10°C to +70°C) grade. Customer de-
velopment kits are also available for custom device
prototyping and device evaluation. Please see “Order-
ing Information” on page 2 for complete details.
Pin-Out Diagram
Hardware Controls Settings
1
2
3
4
5
6
7
8
9
10
FILTP
CLK_OUT
GND
VD
FILTN
OUT_EN
M1
M0
LOCK
CLK_IN
M1 M0 PLL_OUT
00
1x CLK_IN
01 2x CLK_IN
10 4x CLK_IN
11 8x CLK_IN
OUT_EN CLK_OUT
0
Enabled
1 High Impedance
6 MHz to 75 MHz
PLL Output
3.3 V
Fractional-N
Frequency Synthesizer
128 Hz BW Digital PLL
& Fractional N Logic
Output to Input
Clock Ratio
N
750 kHz to 30 MHz
Frequency Reference
LCO
M[1:0]
00=1x
01=2x
10=4x
11=8x
Ratio Selection
PLL Lock
Indicator
Output
Enable/Disable
FILTP
FILTN
0.1 µF
CLK_IN
M1
M0
OUT_EN
LOCK
VD
0.1 µF 1 µF
GND
CLK_OUT
February '08
PS855A1
CS2300-02
CS2300-02
PS855A1 2
1. PIN DESCRIPTIONS
See the CS2300-OTP datasheet for additional pin de-
scription information.
2. SPECIFICATIONS
Please see the CS2300-OTP datasheet for package in-
formation, device characteristics, and specifications ex-
cept where noted due to specific programming options.
3. OPERATIONAL INFORMATION
Complete operational information can be found in the
CS2300-OTP datasheet. Specific operational details
dictated by the programming of the CS2300-02 are in-
cluded below.
The PLL clock output is forced to 0 when the PLL is
unlocked, both upon loss of the CLK_IN signal or
briefly when switching mode pin configurations.
The minimum loop filter bandwidth once locked is
128 Hz.
4. CONFIGURATION INFORMATION
The CS2300-02 has been factory pre-programmed with a unique configuration. The following table outlines the spe-
cific configuration profile which can be compared to the CS2300-OTP datasheet for detailed functional descriptions.
5. ORDERING INFORMATION
Pin Name # Pin Description
VD 1 Digital Power
GND 2 Ground
CLK_OUT 3 PLL Clock Output
LOCK
4 Active Low PLL Lock Indicator
CLK_IN 5 Clock Input
FILTP
FILTN
6
7
LCO Filter Connections
OUT_EN
8 Active Low CLK_OUT Enable Input
M1
M0
9
10
Mode Selection Inputs
OTP Modal and Global Configuration Parameters Form
Mode 0 Mode 1 Mode 2 Mode 3
Ratio 0 (dec) 1248
Ratio 0 (hex) 00:10:00:00 00:20:00:00 00:40:00:00 00:80:00:00
RModSel1 0000
RModSel0 0000
AuxOutSrc1 1111
AuxOutSrc0 1111
AutoRMod 0000
Global Configuration Set
ClkSkipEn AuxLockCfg ClkOutUnl LFRatioCfg M2Cfg2 M2Cfg1 M2Cfg0
0 0 0 1 0 0 0
ClkIn_BW2 ClkIn_BW1 ClkIn_BW0
1 1 1
Product Description Package
Pb-Free Grade
Temp Range Container
Order#
CS2300-02 Clocking Device 10L-MSOP Yes Commercial -10° to +70°C
Rail CS230002-CZZ
Tape and
Reel
CS230002-CZZR
CDK-2000 Evaluation Platform - Yes - - - CDK-2000-LCO
CS2300-02
PS855A1 3
6. REVISION HISTORY
Release Changes
A1 Initial Release
Contacting Cirrus Logic Support
For all product questions and inquiries, contact a Cirrus Logic Sales Representative.
To find one nearest you, go to www.cirrus.com.
IMPORTANT NOTICE
“Advance” product information describes products that are in development and subject to development changes. Cirrus Logic, Inc. and its subsidiaries (“Cirrus”) be-
lieve that the information contained in this document is accurate and reliable. However, the information is subject to change without notice and is provided “AS IS
without warranty of any kind (express or implied). Customers are advised to obtain the latest version of relevant information to verify, before placing orders, that
information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment,
including those pertaining to warranty, indemnification, and limitation of liability. No responsibility is assumed by Cirrus for the use of this information, including use
of this information as the basis for manufacture or sale of any items, or for infringement of patents or other rights of third parties. This document is the property of
Cirrus and by furnishing this information, Cirrus grants no license, express or implied under any patents, mask work rights, copyrights, trademarks, trade secrets or
other intellectual property rights. Cirrus owns the copyrights associated with the information contained herein and gives consent for copies to be made of the infor-
mation only for use within your organization with respect to Cirrus integrated circuits or other products of Cirrus. This consent does not extend to other copying such
as copying for general distribution, advertising or promotional purposes, or for creating any work for resale.
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CS230002-CZZR

Mfr. #:
Manufacturer:
Cirrus Logic
Description:
Phase Locked Loops - PLL IC Clock BW128Hz w/1x2x4x8x mult
Lifecycle:
New from this manufacturer.
Delivery:
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