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MPC962309EF-1HR2

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18
MPC962305 REVISION 8 3/15/16 4 ©2016 Integrated Device Technology, Inc.
MPC962305 Data Sheet LOW-COST, 3.3V ZERO DELAY BUFFEr
Table 7. Switching Characteristics for MPC962305-1 and MPC962309-1 Industrial Temperature Devices
(1)
1. All parameters are specified with loaded outputs.
Parameter Name Test Conditions Min Typ Max Unit
t
1
Output Frequency 30-pF load
10-pF load
10
10
100
133.33
MHz
MHz
Duty Cycle
(2)
= t
2
t
1
2. Parameter is guaranteed by design and characterization. Not 100% tested in production.
Measured at 1.4 V, F
OUT
= 66.67 MHz 40.0 50.0 60.0 %
t
3
Rise Time
(2)
Measured between 0.8 V and 2.0 V 2.50 ns
t
4
Fall Time
(2)
Measured between 0.8 V and 2.0 V 2.50 ns
t
5
Output to Output Skew
(2)
All outputs equally loaded 250 ps
t
6A
Delay, REF Rising Edge to
CLKOUT Rising Edge
(2)
Measured at V
DD
/2 0 350 ps
t
6B
Delay, REF Rising Edge to
CLKOUT Rising Edge
(2)
Measured at V
DD
/2. Measured in PLL Bypass Mode,
MPC962309 device only
158.7ns
t
7
Device to Device Skew
(2)
Measured at V
DD
/2 on the CLKOUT pins of devices 0 700 ps
t
J
Cycle to Cycle Jitter
(2)
Measured at 66.67 MHz, loaded outputs 200 ps
t
LOCK
PLL Lock Time
(2)
Stable power supply, valid clock presented on REF pin 1.0 ms
Table 8. Switching Characteristics for MPC962305-1H and MPC962309-1H Industrial Temperature Devices
(1)
1. All parameters are specified with loaded outputs.
Parameter Name Test Conditions Min Typ Max Unit
t
1
Output Frequency 30-pF load
10-pF load
10
10
100
133.33
MHz
MHz
Duty Cycle
(2)
= t2 t1
2. Parameter is guaranteed by design and characterization. Not 100% tested in production.
Measured at 1.4 V, F
OUT
= 66.67 MHz 40.0 50.0 60.0 %
Duty Cycle
(2)
= t2 t1
Measured at 1.4 V, F
OUT
< 50 MHz 45.0 55.0 55.0 %
t
3
Rise Time
(2)
Measured between 0.8 V and 2.0 V 1.50 ns
t
4
Fall Time
(2)
Measured between 0.8 V and 2.0 V 1.50 ns
t
5
Output to Output Skew
(2)
All outputs equally loaded 250 ps
t
6A
Delay, REF Rising Edge to
CLKOUT Rising Edge
(2)
Measured at V
DD
/2 0 350 ps
t
6B
Delay, REF Rising Edge to
CLKOUT Rising Edge
(2)
Measured at V
DD
/2. Measured in PLL Bypass Mode,
MPC962309 device only
158.7ns
t
7
Device to Device Skew
(2)
Measured at V
DD
/2 on the CLKOUT pins of devices 0 700 ps
t
8
Output Slew Rate
(2)
Measured between 0.8 V and 2.0 V using Test Circuit #2 1 V/ns
t
J
Cycle to Cycle Jitter
(2)
Measured at 66.67 MHz, loaded outputs 200 ps
t
LOCK
PLL Lock Time
(2)
Stable power supply, valid clock presented on REF pin 1.0 ms
MPC962305 REVISION 8 3/15/16 5 ©2016 Integrated Device Technology, Inc.
MPC962305 Data Sheet LOW-COST, 3.3V ZERO DELAY BUFFEr
APPLICATIONS INFORMATION
Figure 1. Output-to-Output Skew t
SK(O)
Figure 2. Static Phase Offset Test Reference
Figure 3. Output Duty Cycle (DC) Figure 4. Device-to-Device Skew
Figure 5. Cycle-to-Cycle Jitter Figure 6. Output Transition Time Test Reference
The pin-to-pin skew is defined as the worst case difference in propagation
delay between any similar delay path within a single device
V
CC
1.4 V
GND
V
CC
1.4 V
GND
t
5
V
CC
V
CC
2
GND
V
CC
V
CC
2
GND
t
6
CCLK
FB_IN
The time from the PLL controlled edge to the non-controlled
edge, divided by the time between PLL controlled edges,
expressed as a percentage
V
CC
1.4 V
GND
t
2
t
1
DC = t
2
/t
1
x 100%
V
CC
V
CC
2
GND
V
CC
V
CC
2
GND
t
7
DEVICE 1
DEVICE 2
The variation in cycle time of a signal between adjacent cycles,
over a random sample of adjacent cycle pairs
t
N
t
J
= |t
N
–t
N+1
|
t
N+1
t
4
t
3
V
CC
= 3.3 V
2.0
0.8
MPC962305 REVISION 8 3/15/16 6 ©2016 Integrated Device Technology, Inc.
MPC962305 Data Sheet LOW-COST, 3.3V ZERO DELAY BUFFEr
Table 9. Ordering Information
Ordering Code Package Type
MPC962305D-1 8-pin 150-mil SOIC
MPC962305D-1R2 8-pin 150-mil SOIC - Tape and Reel
MPC962305EF-1 8-pin 150-mil SOIC (Pb-free)
MPC962305EF-1R2 8-pin 150-mil SOIC (Pb-free) - Tape and Reel
MPC962305D-1H 8-pin 150-mil SOIC
MPC962305D-1HR2 8-pin 150-mil SOIC - Tape and Reel
MPC962305EF-1H 8-pin 150-mil SOIC (Pb-free)
MPC962305EF-1HR2 8-pin 150-mil SOIC (Pb-free) - Tape and Reel
MPC962305DT-1H 8-pin 150-mil TSSOP
MPC962305DT-1HR2 8-pin 150-mil TSSOP - Tape and Reel
MPC962305EJ-1H 8-pin 150-mil TSSOP (Pb-free)
MPC962305EJ-1HR2 8-pin 150-mil TSSOP (Pb-free) - Tape and Reel
MPC962309D-1 16-pin 150-mil SOIC
MPC962309D-1R2 16-pin 150-mil SOIC - Tape and Reel
MPC962309EF-1 16-pin 150-mil SOIC (Pb-free)
MPC962309EF-1R2 16-pin 150-mil SOIC (Pb-free) - Tape and Reel
MPC962309D-1H 16-pin 150-mil SOIC
MPC962309D-1HR2 16-pin 150-mil SOIC - Tape and Reel
MPC962309EF-1H 16-pin 150-mil SOIC (Pb-free)
MPC962309EF-1HR2 16-pin 150-mil SOIC (Pb-free) - Tape and Reel
MPC962309DT-1H 16-pin 4.4-mm TSSOP
MPC962309DT-1HR2 16-pin 4.4-mm TSSOP - Tape and Reel
MPC962309EJ-1H 16-pin 4.4-mm TSSOP (Pb-free)
MPC962309EJ-1HR2 16-pin 4.4-mm TSSOP (Pb-free) - Tape and Reel
0.1 F
0.1 F
CLK
OUT
C
LOAD
V
DD
V
DD
OUTPUTS
GND GND
Test Circuit #1
Test Circuit for all parameters except t
8
0.1 F
0.1 F
CLK
OUT
10 pF
V
DD
V
DD
OUTPUTS
GND GND
Test Circuit #2
Test Circuit for t
8
, Output slew rate on –1H, –5 device
1 K
1 K
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18

MPC962309EF-1HR2

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Buy MPC962309EF-1HR2
Manufacturer:
IDT
Description:
Clock Buffer 9 LVCMOS OUT BUFFER
Lifecycle:
New from this manufacturer.
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