19
LTC1197/LTC1197L
LTC1199/LTC1199L
The effective resolution of the LTC1197/LTC1197L can be
increased by reducing the input span of the converter. The
LTC1197/LTC1197L exhibits good linearity and gain over
a wide range of reference voltages (see typical curves of
Linearity and Full-Scale Error vs Reference Voltage). How-
ever, care must be taken when operating at low values of
V
REF
because of the reduced LSB step size and the
resulting higher accuracy requirement placed on the con-
verter. The following factors must be considered when
operating at low V
REF
values.
1. Offset
2. Noise
3. Conversion speed (CLK frequency)
Offset with Reduced V
REF
The offset of the LTC1197/LTC1197L has a larger effect on
the output code when the ADC is operated with reduced
reference voltage. The offset (which is typically a fixed
voltage) becomes a larger fraction of an LSB as the size of
the LSB is reduced. The typical curve of LTC1197 Offset
Error vs Reference Voltage shows how offset in LSBs is
related to reference voltage for a typical value of V
OS
. For
example, a V
OS
of 1mV which is 0.2LSB with a 5V reference
becomes 1LSB with a 1V reference and 5LSBs with a 0.2V
reference. If this offset is unacceptable, it can be corrected
digitally by the receiving system or by offsetting the “–”
input of the LTC1197/LTC1197L.
Noise with Reduced V
REF
The total input referred noise of the LTC1197/LTC1197L
can be reduced to approximately 200µV peak-to-peak
using a ground plane, good bypassing, good layout tech-
niques and minimizing noise on the reference inputs. This
noise is insignificant with a 5V reference but will become
a larger fraction of an LSB as the size of the LSB is reduced.
For operation with a 5V reference, the 200µV noise is
only 0.04LSB peak-to-peak. In this case, the LTC1197/
LTC1197L noise will contribute virtually no uncertainty
to the output code. However, for reduced references, the
noise may become a significant fraction of an LSB and
cause undesirable jitter in the output code. For example,
with a 1V reference, this same 200µV noise is 0.2LSB
peak-to-peak. This will reduce the range of input volt-
ages over which a stable output code can be achieved. If
the reference is further reduced to 200mV, the 200µV of
noise becomes equal to 1LSB and a stable code may be
difficult to achieve. In this case, averaging readings may
be necessary.
This noise data was taken in a very clean setup. Any setup-
induced noise (noise or ripple on V
CC
, V
REF
or V
IN
) will add
to the internal noise. The lower the reference voltage to be
used, the more critical it becomes to have a clean, noise-
free setup.
Conversion Speed with Reduced V
REF
With reduced reference voltages the LSB step size is
reduced and the LTC1197/LTC1197L internal comparator
overdrive is reduced. Therefore, it may be necessary to
reduce the maximum CLK frequency when low values of
V
REF
are used.
Input Divider
It is OK to use an input divider on the reference input of the
LTC1197/LTC1197L as long as the reference input can be
made to settle within the bit time at which the clock is
running. When using a larger value resistor divider on the
reference input, the “–” input should be matched with an
equivalent resistance.
Bypassing Reference Input with Divider
Bypassing the reference input with a divider is also pos-
sible. However, care must be taken to make sure that the
DC voltage on the reference input will not drop too much
below the intended reference voltage.
APPLICATIO S I FOR ATIO
WUUU
20
LTC1197/LTC1197L
LTC1199/LTC1199L
Signal-to-Noise Ratio
T
he signal-to-noise ratio (SNR) is the ratio between the
RMS amplitude of the fundamental input frequency to
the RMS amplitude of all other frequency components at
the A/D output. This includes distortion as well as noise
products and for this reason it is sometimes referred to
as signal-to-noise + distortion [S/(N + D)]. The output is
band limited to frequencies from DC to one half the
sampling frequency. Figure 9 shows spectral content
from DC to 250kHz which is 1/2 the 500kHz sampling
rate.
Effective Number of Bits
The effective number of bits (ENOBs) is a measurement of
the resolution of an ADC and is directly related to the
S/(N + D) by the equation:
ENOB = [S/(N + D) –1.76]/6.02
where S/(N + D) is expressed in dB. At the maximum
sampling rate of 500kHz, the LTC1197 maintains 9.5
ENOBs or better to 200kHz. Above 200kHz, the ENOBs
gradually decline, as shown in Figure 10, due to increasing
second harmonic distortion. The noise floor remains
approximately 100dB.
FREQUENCY (kHz)
0
AMPLITUDE (dB)
–40
–20
–30
–10
0
1197/99 G06
–60
–80
–50
–70
–90
–100
50
100 150 200 250
f
SMPL
= 500kHz
f
IN
= 97.045898kHz
Figure 9. This Clean FFT of a 97kHz Input Shows Remarkable
Performance for an ADC Sampling at the 500kHz Rate
FREQUENCY (kHz)
1
4
ENOBs
5
6
7
8
10 100 1000
1197/99 G07
3
2
1
0
9
10
V
CC
= 2.7V
f
SMPL
= 250kHz
V
CC
= 5V
f
SMPL
= 500kHz
Figure 10. Dynamic Accuracy is Maintained
Up to an Input Frequency of 200kHz for the
LTC1197 and 50kHz for the LTC1197L
APPLICATIO S I FOR ATIO
WUUU
21
LTC1197/LTC1197L
LTC1199/LTC1199L
MICROPROCESSOR INTERFACES
The LTC1197/LTC1197L/LTC1199/LTC1199L can inter-
face directly (without external hardware to most popular
microprocessor (MPU) synchronous serial formats (see
Table 1). If an MPU without a dedicated serial port is used,
then three or four of the MPU’s parallel port lines can be
programmed to form the serial link. Included here is one
serial interface example and one example showing a
parallel port programmed to form the serial interface.
Motorola SPI (MC68HC05C4, MC68HC11)
The MC68HC05C4 has been chosen as an example of an
MPU with a dedicated serial port. This MPU transfers data
MSB-first and in 8-bit increments. With two 8-bit trans-
fers, the A/D result is read into the MPU. The first 8-bit
transfer sends the D
IN
word to the LTC1199 and clocks the
two ADC MSBs (B9 and B8) into the MPU. The second 8-
bit transfer clocks the next 8 bits, B7 through B0, of the
ADC into the MPU.
ANDing the first MPU received byte with 03Hex clears the
six MSBs. Notice how the position of the start bit in the D
IN
word is used to position the A/D result so that it is right-
justified in two memory locations.
Table 1. Microprocessor with Hardware Serial Interfaces
Compatible with the LTC1197/LTC1197L/LTC1199/LTC1199L
PART NUMBER TYPE OF INTERFACE
Motorola
MC6805S2,S3 SPI
MC68HC11 SPI
MC68HC05 SPI
RCA
CDP68HC05 SPI
Hitachi
HD6301 SCI Synchronous
HD6303 SCI Synchronous
HD6305 SCI Synchronous
HD63701 SCI Synchronous
HD63705 SCI Synchronous
HD64180 CSI/O
National Semiconductor
COP400 Family MICROWIRE
TM
COP800 Family MICROWIRE/PLUS
TM
NSC8050U MICROWIRE/PLUS
HPC16000 Family MICROWIRE/PLUS
Texas Instruments
TMS7000 Family Serial Port
TMS320 Family Serial Port
Microchip Technology
PIC16C60 Family SPI, SCI Synchronous
PIC16C70 Family SPI, SCI Synchronous
MICROWIRE and MICROWIRE/PLUS are trademarks of
National Semiconductor Corp.
TYPICAL APPLICATIO S
U

LTC1199LIMS8#TRPBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Analog to Digital Converters - ADC 210ksps 2/Ch input 3V,10-Bit ADC
Lifecycle:
New from this manufacturer.
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