Xilinx Parallel Cable IV
DS097 (v2.5) May 14, 2008 www.xilinx.com
Product Specification 7
R
Cable Power
The host interface cable (Figure 8) includes a short power
jack for connection to one of two possible +5V DC power
sources: (1) the keyboard or mouse part of the host PC or
(2) an external AC adapter. The supplied power splitter
cable is required when using the first option. The splitter
cable is installed between the mouse cable and the
standard 6-pin mini-DIN connector on the host PC.
PC4 operating current is less than 100 mA. It draws
approximately 15 mA from the target reference voltage bus
to power the SPI/JTAG/Slave Serial buffers.
Figure 7 shows a PC4 cable connection to a laptop.
Power Supply Sources
Tabl e 4 provides some third-party sources for power supplies that are compatible with the Parallel Cable IV.
X-Ref Target - Figure 7
Figure 7: Laptop PC4 Cable Connection
X-Ref Target - Figure 8
Figure 8: Optional Power Brick Connection to Parallel Cable IV
End View of Power Jack
2.1 mm
5.5 mm
End View of Power Plug
2.1 mm
5.5 mm
5V DC +/- 0.25V
To
Computer
Parallel
Port
Main Cable to
Parallel Cable IV
Power Plug from
regulated 5V 200 mA supply
with 5.5 mm OD x 2.1 mm ID Plug
ds097_04_050508
Power Jack
Cable
Tabl e 4 : Power Supply Sources
(1, 2)
Part Number Description Manufacturer URL Distributor URL
DTS050400UC-P5P-KH
(3)
5V, 12W, 3 Prong Inlet CUI Stack www.cuistack.com DigiKey www.digikey.com
DTS050250SUDC-P5P 5V, 12W, 2 Prong Inlet CUI Stack www.cuistack.com DigiKey www.digikey.com
FW1805-S760
(3)
5V, 15W, 3 Prong Inlet Elpac www.elpac.com ––
Notes:
1. The external power supply must provide a regulated +5.0V DC @ 200 mA minimum.
2. The PC4 pigtail connector only mates with a power supply that uses a 2.1 mm plug on its DC output cable.
3. The three-prong Inlet power supplies are recommended for international use so that a variety of AC plug styles can be accommodated with
a single power supply.
Xilinx Parallel Cable IV
DS097 (v2.5) May 14, 2008 www.xilinx.com
Product Specification 8
R
Status LED
The Status LED indicates one of two possible conditions as
shown in the following table.
Automatic I/O Voltage Sensing
Although JTAG configuration pins have typically operated at
3.3V or 5.0V, new devices support voltages as low as 1.5V.
Voltage levels for Slave-Serial configuration pins follow the
respective I/O bank voltage, which can be in the range from
1.5V to 5.0V. SPI pin voltage levels are the same as the SPI
device power supply voltage which is typically 3.3V or 2.5V.
Consequently, the PC4 output buffers must be capable of
driving at the voltage level expected by the receiving
devices. The V
REF
pin on the target device is used to bias
the PC4 output buffers.
A sensing circuit continuously monitors the V
REF
pin. If
V
REF
drops below 1.3V DC, all output buffers are 3-stated to
avoid any possible damage when connected to a non-
powered target system.
All pins are protected against continuous shorts to ground
or voltages up to 5.5V DC.
IEEE 1284 Cable Specifications
Level 1 compliant host ports are designed to operate over a
maximum cable length of 10 ft. Level 2 compliant host ports
operates over a maximum cable length of 33 ft. PC4 uses a
Level 2 compliant cable interface buffer.
For more cable information, see the following web site:
www.xilinx.com/products/design_resources/config_sol/
Signal Integrity Issues
The PC4 uses high slew rate buffers to drive TCK, TMS, and
TDI. Users should pay close attention to proper PCB layout
and signal termination to avoid transmission line effects.
Users are encouraged to refer to the Xilinx
"Signal Integrity"
documentation and the application note
XAPP361, Planning
for High Speed XC9500XV Designs, on the Xilinx web site.
PC4 Operating Characteristics
Absolute Maximum Ratings
Recommended Operating Conditions
Ordering Information
The device number is HW-PC4.
LED State Operating Condition
Solid Green Power available to POD and V
REF
detected.
Solid Amber Power available to POD but no V
REF
detected.
Notes:
1. If LED does not turn on, check to make sure that power has been
connected to the PC4 either through the mouse/keyboard port or
through the external power connector.
Symbol Description Value Units
V
CC
Supply Voltage 5.5 V
T
A
Operating Temperature Range 0• to +70• C
T
STG
Storage Temperature Range –40• to +85• C
P
D
Power Dissipation 750 mW
I
OUT
DC Output Current (TDI, TCK, TMS, INIT) ±32 mA
Symbol Parameter Conditions Min Max Units
V
CC
DC Supply Voltage External P/S 4.75 5.25 V
V
REF
Target Reference Voltage 1.5 5.5 V
I
CC
Operating Current 60 100 mA
I
REF
Reference Current 6.0 15.0 mA
V
OH
High Level Output Voltage V
REF
= 3.3V DC, I
OH
= –4 mA 2.7 V
V
OL
Low Level Output Voltage V
REF
= 3.3V DC, I
OL
= +4 mA 0.36 V
V
IH
High Level Input Voltage V
REF
> 1.5V 1.2 V
V
IL
Low Level Input Voltage V
REF
> 1.5V 0.4 V
Xilinx Parallel Cable IV
DS097 (v2.5) May 14, 2008 www.xilinx.com
Product Specification 9
R
Revision History
The following table shows the revision history for this document.
Notice of Disclaimer
THE XILINX HARDWARE FPGA AND CPLD DEVICES REFERRED TO HEREIN (“PRODUCTS”) ARE SUBJECT TO THE TERMS AND
CONDITIONS OF THE XILINX LIMITED WARRANTY WHICH CAN BE VIEWED AT http://www.xilinx.com/warranty.htm
. THIS LIMITED
WARRANTY DOES NOT EXTEND TO ANY USE OF PRODUCTS IN AN APPLICATION OR ENVIRONMENT THAT IS NOT WITHIN THE
SPECIFICATIONS STATED IN THE XILINX DATA SHEET. ALL SPECIFICATIONS ARE SUBJECT TO CHANGE WITHOUT NOTICE.
PRODUCTS ARE NOT DESIGNED OR INTENDED TO BE FAIL-SAFE OR FOR USE IN ANY APPLICATION REQUIRING FAIL-SAFE
PERFORMANCE, SUCH AS LIFE-SUPPORT OR SAFETY DEVICES OR SYSTEMS, OR ANY OTHER APPLICATION THAT INVOKES
THE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). USE OF PRODUCTS IN CRITICAL APPLICATIONS IS AT THE SOLE RISK OF CUSTOMER, SUBJECT TO
APPLICABLE LAWS AND REGULATIONS.
Date Version Revision
11/26/01 1.0 Initial Xilinx release.
11/30/01 1.1 Changed to Advance Product Specification.
01/21/02 1.2 Fixed the links in Ta bl e 4 .
02/06/02 1.3 Added "Signal Integrity Issues," page 8.
03/08/02 1.4 Added Ordering Information.
03/12/02 1.5 Updated "Features," page 1.
03/03/03 1.6 Added TDO timing specification, pinout descriptions, desktop environment statement, Figure 7, fixed
broken link.
04/14/03 1.7 Added Spartan-3 to supported devices list, plus other edits.
04/29/03 1.8 Added "Platform Flash family" to "Features," page 1.
05/21/03 1.9 Fixed broken link on page 7.
01/15/04 2.0 Changed status of data sheet from Advance to Preliminary.
Updated compatible PC operating systems (Win2000 and WinXP).
Added Figure 5 (POD diagram).
Updated FCI connector part numbers, Tabl e 1.
Changed textual references to cable from "PC IV" to "PC4".
08/25/04 2.1 Figure 4: Added note identifying Pin 1 as a "virtual ground" pin and clarifying how it should be used.
Corrected part number of Molex connector. Deleted Digi-Key part number.
Ta ble 1 : Added Footnote (1) regarding pin assignments. Corrected Molex connector part numbers.
Ta ble 2 : Added explanation of Pin 1 "virtual ground" to definition of GND pins.
Ta ble 4 : Corrected power supply part number in first line of table to DTS050400UC-P5P-KH.
11/30/05 2.2 Updated supported devices in "Features," page 1 to include all Spartan series and all Virtex series
FPGAs, and removed obsolete System ACE MPM.
Updated supported operating systems under "Connecting to Host Computer," page 2.
Updated broken links.
11/17/06 2.3 Completed minor updates.
Added support for serial-access flash PROM programming.
11/28/06 2.3.1 Removed misplaced text from Figure 4, page 3.
11/19/07 2.4 Updated document template.
Updated URLs.
Added note to Page 1 regarding the availability of Platform Cable USB.
05/14/08 2.5 Updated "Parallel Cable IV Description," page 1 to clarify PC4 indirect programming support.
Updated trademark notations.

HW-PC4

Mfr. #:
Manufacturer:
Xilinx
Description:
CABLE PROGRAMMING FOR XILINX DEV
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet