CS8183YDWFR20

CS8183
http://onsemi.com
4
TYPICAL CHARACTERISTICS
18
16
14
12
10
8
6
4
2
0
Figure 2. Quiescent Current vs. Output Current
0 20 40 60 80 100 120 140 160 180 200
OUTPUT CURRENT (mA)
QUIESCENT CURRENT (mA)
Figure 3. Quiescent Current vs. Input Voltage
(Operating Mode)
1
0.9
0.8
0.7
0.6
0.5
0.3
0.2
0.1
0
0 5 10 15 20 25 30 35 40 45
V
IN
, INPUT VOLTAGE (V)
QUIESCENT CURRENT (mA)
0.4
Figure 4. Quiescent Current vs. Input Voltage
(Sleep Mode)
Figure 5. V
out
Reverse Current Figure 6. V
out
Reverse Current
100
90
80
70
60
50
30
20
10
0
0 5 10 15 20 25 30 35 40 45
V
IN
, INPUT VOLTAGE (V)
QUIESCENT CURRENT (mA)
40
20
18
16
14
12
10
6
4
2
0
0 5 10 15 20 25
FORCED V
out
VOLTAGE (V)
CURRENT INTO V
out
(mA)
8
140
120
100
80
60
40
20
0
0 5 10 15 20 25
FORCED V
out
VOLTAGE (V)
CURRENT INTO V
out
(mA)
30 35 40
I (V
out
) = 20 mA
I (V
out
) = 1 mA
V
ref
/ ENABLE = 0 V
V
in
= 6 V*
V
ref
= 5 V**
V
in
= 0 V
* Graph is duplicate for V
in
> 1.6V.
**Dip (@5V) shifts with V
ref
voltage.
V
in
= 6 V*
V
ref
= 5 V**
V
in
= 0 V
* Graph is duplicate for V
in
> 1.6V.
**Dip (@5V) shifts with V
ref
voltage.
CS8183
http://onsemi.com
5
CIRCUIT DESCRIPTION
ENABLE Function
By pulling the V
REF
/ENABLE 1, 2 lead below 2.0 V
typically, (see Figure 10 or Figure 11), the IC is disabled and
enters a sleep state where the device draws less than 30 mA
from supply. When the V
REF
/ENABLE lead is greater than
2.75 V, V
OUT
tracks the V
REF
/ENABLE lead normally.
Output Voltage
Figures 7 through 12 only display one channel of the
device for simplicity. The configurations shown apply
for both channels.
The outputs are capable of supplying 200 mA to the load
while configured as a similiar (Figure 7), lower (Figure 9),
or higher (Figure 8) voltage as the reference lead. The Adj
lead acts as the inverting terminal of the op amp and the
V
REF
lead as the noninverting.
The device can also be configured as a highside driver as
displayed in Figure 12.
Figure 7. Tracking Regulator at the Same Voltage
Figure 8. Tracking Regulator at Higher Voltages
V
IN
V
OUT
GND
GND
V
REF
/
GND
GND
Adj
ENABLE
Loads
5.0 V
B+
C1*
1.0 mF
C2**
10 mF
V
OUT
, 200 mA
V
OUT
+ V
REF
V
IN
V
OUT
GND
GND
V
REF
/
GND
GND
Adj
ENABLE
Loads
V
REF
B+
C1*
1.0 mF
C2**
10 mF
V
OUT
, 200 mA
R
A
R
F
V
OUT
+ V
REF
(1 )
R
E
R
A
)
CS8183
CS8183
C3***
10 nF
C3***
10 nF
Figure 9. Tracking Regulator at Lower Voltages
Figure 10. Tracking Regulator with ENABLE Circuit
V
IN
V
OUT
GND
GND
V
REF
/
GND
GND
Adj
ENABLE
Loads
V
REF
B+
C1*
1.0 mF
C2**
10 mF
V
OUT
, 200 mA
V
OUT
+ V
REF
(
R2
R1 ) R2
)
R2
R1
V
IN
V
OUT
GND
GND
V
REF
/
GND
GND
Adj
ENABLE
from MCU
V
RE
F
B+
C1*
1.0 mF
C2**
10 mF
V
OUT
, 200 mA
R
CS8183
CS8183
C3***
10 nF
C3***
10 nF
Figure 11. Alternative ENABLE Circuit
Figure 12. HighSide Driver
V
IN
V
OUT
GND
GND
V
REF
/
GND
GND
Adj
ENABLE
10 mF
V
IN
V
OUT
GND
GND
V
REF
/
GND
GND
Adj
ENABLE
MCU
B+200 mA
V
OUT
+ B )*V
SAT
** C2 is required for stability
* C1 is required if the regulator is far from the power source filter
CS8183
CS8183
5.0 V
I/O
NCV8501
6.0 V40 V
V
IN
100 nF
V
REF
(5.0 V)
mC
To Load
(e.g. sensor)
C1*
1.0 mF
C3***
10 nF
C3***
10 nF
*** C3 is recommended for EMC susceptibility
CS8183
http://onsemi.com
6
V
IN1
V
OUT1
NC
NC
GND
GND
NC
NC
V
OUT2
V
IN2
NC
NC
GND
GND
NC
NC
V
ADJ1
V
REF
/
ENABLE1
V
REF
/
ENABLE2
V
ADJ2
C2
20 mF
V
OUT
400 mA
B+
V
REF
C1
2.0 mF
Figure 13. 400 mA Loading
400 mA Output Capability
Normally regulator outputs cannot be combined to
increase capability. This can cause damage to an IC because
of mismatches in the output drivers. The tight tolerances in
tracking of the CS8183 allow their outputs to be combined
for increased performance. Figure 13 shows the circuit
connections needed to perform this function.
APPLICATION NOTES
Switched Application
The CS8183 has been designed for use in systems where
the reference voltage on the V
REF
/ENABLE pin is
continuously on. Typically, the current into the
V
REF
/ENABLE pin will be less than 1.0 mA when the
voltage on the V
IN
pin (usually the ignition line) has been
switched out (V
IN
can be at high impedance or at ground.)
Reference Figure 14.
V
OUT
GND
GND
Adj
V
IN
GND
GND
V
REF
/
ENABLE
V
OUT
V
REF
5.0 V
V
BAT
C1
1.0 mF
Ignition
Switch
< 1.0 mA
CS8183
Figure 14.
C2
10 mF
External Capacitors
Output capacitors for the CS8183 are required for
stability. Without them, the regulator outputs will oscillate.
Actual size and type may vary depending upon the
application load and temperature range. Capacitor effective
series resistance (ESR) is also a factor in the IC stability.
Worstcase is determined at the minimum ambient
temperature and maximum load expected.
The output capacitors can be increased in size to any
desired value above the minimum. One possible purpose of
this would be to maintain the output voltage during brief
conditions of negative input transients that might be
characteristic of a particular system.
The capacitors must also be rated at all ambient
temperatures expected in the system. To maintain regulator
stability down to 40°C, a capacitor rated at that temperature
must be used.
More information on capacitor selection for SMART
REGULATOR®s is available in the SMART REGULATOR
application note, “Compensation for Linear Regulators.”
Calculating Power Dissipation in a Dual Output Linear
Regulator
The maximum power dissipation for a dual output
regulator (Figure 15) is:
PD(max) +
{
V
IN
(max) * V
OUT1
(min)
}
I
OUT1
(max)
)
{
V
IN
(max) * V
OUT2
(min)
}
I
OUT2
(max2)
(1)
) V
IN
(max)I
Q
where:
V
IN(max)
is the maximum input voltage,
V
OUT1(min)
is the minimum output voltage from V
OUT1
,
V
OUT2(min)
is the minimum output voltage from V
OUT2
,

CS8183YDWFR20

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
LDO Voltage Regulators 2.8-45V ADJ 200mA
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet