ADG3232
–7–
TEST CIRCUITS
INPUT
0V
V
OH
V
OL
V
CC1
V
T
V
L
t
PLH
t
PHL
OUTPUT
Figure 1. Propagation Delay
EN
t
EN
Y2
t
DIS
V
T
0V
V
OH
V
CC1
V
T
V
T
0V
V
CC1
0V
V
CC1
V
OL
A1
A2
Figure 2. Enable and Disable Times
DESCRIPTION
The ADG3232 is a mux level translating device designed on a
submicron process that operates from supplies as low as 1.65 V.
The device is guaranteed for operation over the supply range
1.65 V to 3.6 V. It operates from two supply voltages, allowing
bidirectional level translation, i.e., it translates lower voltages to
higher voltages and vice versa. The signal path is unidirectional,
meaning data may only ow from A to Y.
A1 and EN Input
The A1 and enable (EN) inputs have V
IL
/V
IH
logic levels so that
the part can accept logic levels of V
OL
/V
OH
independent of the
value of the supply being used. Both these inputs (A1 and EN)
are capable of accepting inputs outside the V
CC1
supply range.
There are no internal diodes to the supply rails on these pins, so
they can handle inputs above the supply but inside the absolute
maximum ratings.
Operation
Figure 3 shows the ADG3232 in a typical application; the signal
paths are from A1 or A2 to Y. The device will level translate the signal
applied to A1/A2 from a V
CC1
logic level (this level translation can
be either to a higher or a lower supply) and route the signal to the
Y output, which will have standard V
OL
/V
OH
levels for V
CC2
supplies.
The supplies in Figure 3 may be any combination of supplies, e.g.,
V
CC1
and V
CC2
may be anywhere in the 1.65 V to 3.6 V range.
EN
Figure 3. Typical Operation of the ADG3232 Level Translating Switch
REV. A
