LT3590
11
3590f
3590 F08
V
REG
V
REG
V
REG
CTRL
CTRL
C3
C2
C1
V
IN
V
IN
V
IN
LED
R1
L1
LED
OUT
SW
SW
OUT
GND
GND
GND
CTRL
GND
5
6
7
8
4
3
2
1
4
5
7
6
3
2
1
R1
L1
C3
C2
C1
CTRL
GND
V
REG
V
IN
(a) SC70 Package (b) 2mm × 2mm DFN Package
Figure 8. Recommended Component Placement
APPLICATIONS INFORMATION
The dimming range can be further extended by changing
the amplitude of the PWM signal. The height of the PWM
signal sets the commanded sense voltage across the sense
resistor through the CTRL pin. In this manner both analog
dimming and direct PWM dimming extend the dimming
range for a given application. The color of the LEDs no
longer remains constant because the forward current of
the LED changes with the height of the CTRL signal. For
the ten LED application described above, the LEDs can be
dimmed fi rst, modulating the duty cycle of the PWM signal.
Once the minimum duty cycle is reached, the height of the
PWM signal can be decreased below 1.5V down to 150mV.
The use of both techniques together allows the average
LED current for the ten LED application to be varied from
50mA down to less than 50μA.
Internal Voltage Regulator
The LT3590 has a 3.3V onboard voltage regulator capable
of sourcing up to 1mA of current for use by an external
device. This feature may be used to power-up a controller
from the LT3590. The 3.3V is available even during shut-
down. It is required to place a 0.1μF capacitor from V
REG
to ground. The regulator current is limited to 1.5mA.
Board Layout Considerations
As with all switching regulators, careful attention must be
paid to the PCB board layout and component placement.
To prevent electromagnetic interference (EMI) problems,
proper layout of high frequency switching paths is essen-
tial. Minimize the length and area of all traces connected
to the switching node pin (SW). Keep the sense voltage
pins (V
IN
and LED) away from the switching node. Place
the output capacitor, C2, next to the V
IN
pin. Always use
a ground plane under the switching regulator to minimize
interplane coupling. Recommended component placement
is shown in Figure 8.
