ICS342
FIELD PROGRAMMABLE DUAL OUTPUT SS VERSACLOCK SYNTHESIZER EPROM CLOCK SYNTHESIZER
IDT® / ICS™
FIELD PROGRAMMABLE DUAL OUTPUT SS VERSACLOCK SYNTHESIZER 6
ICS342 REV N 090613
AC Electrical Characteristics
Unless stated otherwise, VDD = 3.3V ±5%, Ambient Temperature -40 to +85 C
Note 1: Measured with 15 pF load.
Note 2: Duty Cycle is configuration dependent. Most configurations are minimum 45% and maximum 55%.
Note 3: IDT test mode output occurs for first 170 clock cycles on CLK2 for each PLL powered up. PDTS
transition
high on select address change.
Thermal Characteristics
Parameter Symbol Conditions Min. Typ. Max. Units
Input Frequency F
IN
Fundamental Crystal 5 27 MHz
Input Clock 2 50 MHz
Output Frequency 0.25 200 MHz
Output Rise Time t
OR
20% to 80%, Note 1 1 ns
Output Fall Time t
OF
80% to 20%, Note 1 1 ns
Duty Cycle Note 2 40 49-51 60 %
Output Frequency Synthesis Error Configuration Dependent TBD ppm
Power-up time PLL lock time from
power-up, Note 3
410ms
PDTS
goes high until
stable CLK output, Spread
Spectrum Off, Note 3
0.2 2 ms
PDTS
goes high until
stable CLK output, Spread
Spectrum On, Note 3
47ms
One Sigma Clock Period Jitter Configuration Dependent 50 ps
Maximum Absolute Jitter t
ja
Deviation from Mean.
Configuration Dependent
+200 ps
Parameter Symbol Conditions Min. Typ. Max. Units
Thermal Resistance Junction to
Ambient
JA
Still air 150 C/W
JA
1 m/s air flow 140 C/W
JA
3 m/s air flow 120 C/W
Thermal Resistance Junction to Case
JC
40 C/W
