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MAX9254EUM+TD

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P23
MAX9242/MAX9244/MAX9246/MAX9254
21-Bit Deserializers with Programmable
Spread Spectrum and DC Balance
_______________________________________________________________________________________ 7
Test Circuits/Timing Diagrams (continued)
V
ID
= 0V
1.5V
RCCD
RxCLKIN_
RxCLKOUT
RCIP
Figure 6a. Clock-IN to Clock-OUT Delay (MAX9244/MAX9246/
MAX9254)
V
CC
RxCLKIN_
RxCLKOUT
PWRDWN
3V
2V
RPLLS
HIGH IMPEDANCE
1.5V
Figure 7. Phase-Locked-Loop Set Time
1.5V
PWRDWN
RxCLKIN_
RxOUT_
RxCLKOUT
RPDD
HIGH IMPEDANCE
1.5V
Figure 8. Power-Down Delay
RxCLKIN_
RxCLKOUT
+
-
RCCD
1.5V
V
ID
= 0V
RCIP
Figure 6b. Clock-IN to Clock-OUT Delay (MAX9242)
RxOUT_
RxCLKOUT
RCOP
RCOH RCOL
2.0V
0.8V
2.0V
0.8V
2.0V 2.0V
0.8V 0.8V 0.8V
RHRCRSRC
Figure 5b. Falling-Edge Output Setup/Hold and High/Low Times
MAX9242/MAX9244/MAX9246/MAX9254
21-Bit Deserializers with Programmable
Spread Spectrum and DC Balance
8 _______________________________________________________________________________________
Test Circuits/Timing Diagrams (continued)
FREQUENCY
TIME
f
RxCLKOUT
(MAX)
f
RxCLKIN_
f
RxCLKOUT
(MIN)
1 / f
SSM
Figure 10. Simplified Modulation Profile
RxCLKOUT
SSG OPEN OR LESS THAN ±10μA LEAKAGE
2.5V
0.8V
RxCLKIN_
RxOUT_
RPLLS2
TIMING SHOWN FOR FALLING-EDGE STROBE (MAX9244/MAX9246/MAX9254)
PWRDWN
=
HIGH
Figure 9. Phase-Locked-Loop Set Time from SSG Change
MAX9242/MAX9244/MAX9246/MAX9254
21-Bit Deserializers with Programmable
Spread Spectrum and DC Balance
_______________________________________________________________________________________
9
WORST-CASE AND PRBS SUPPLY CURRENT
vs. FREQUENCY
(NON-DC-BALANCED MODE, NO SPREAD)
MAX9242 toc01
FREQUENCY (MHz)
SUPPLY CURRENT (mA)
35302520
40
50
60
70
80
90
100
30
15 40
WORST-CASE PATTERN
2
7
- 1 PRBS
WORST-CASE AND PRBS SUPPLY CURRENT
vs. FREQUENCY
(DC-BALANCED MODE, NO SPREAD)
MAX9242 toc02
FREQUENCY (MHz)
SUPPLY CURRENT (mA)
35302520
40
50
60
70
80
90
100
30
15 40
WORST-CASE PATTERN
2
7
- 1 PRBS
WORST-CASE AND PRBS SUPPLY CURRENT
vs. FREQUENCY
(DC-BALANCED MODE, 2% SPREAD)
MAX9242 toc03
FREQUENCY (MHz)
SUPPLY CURRENT (mA)
35302520
40
50
60
70
80
90
100
30
15 40
WORST-CASE PATTERN
2
7
- 1 PRBS
WORST-CASE AND PRBS SUPPLY CURRENT
vs. FREQUENCY
(DC-BALANCED MODE, 4% SPREAD)
MAX9242 toc04
FREQUENCY (MHz)
SUPPLY CURRENT (mA)
35302520
40
50
60
70
80
90
100
30
15 40
WORST-CASE PATTERN
2
7
- 1 PRBS
RxOUT_ OUTPUT LOADING
MAX9242 toc05
LOAD (mA)
DROPOUT (V)
21
2.9
3.0
3.1
3.2
3.3
3.4
2.8
03
MAX9254
MAX9244
Typical Operating Characteristics
(V
CC
= PLLV
CC
= LVDSV
CC
= V
CCO
= +3.3V, C
L
= 8pF, PWRDWN = high, differential input voltage |V
ID
| = 0.2V, input common-mode
voltage V
CM
= 1.2V, T
A
= +25°C, MAX9244/MAX9254, unless otherwise noted.)
RxOUT_TRANSITION TIME
vs. OUTPUT SUPPLY VOLTAGE (V
CCO
)
MAX9242 toc06
OUTPUT SUPPLY VOLTAGE (V)
OUTPUT TRANSITION TIME (ns)
3.53.02.52.0
2
4
6
8
10
12
14
0
1.5 4.0 5.04.5 5.5
C
LHT
C
HLT
RxCLKOUT POWER SPECTRUM
vs. FREQUENCY
(RxCLKIN_ = 33MHz, NO SPREAD)
MAX9242 toc07
FREQUENCY (MHz)
POWER SPECTRUM (dBm)
33
-40
-30
-20
-10
0
10
20
-50
-70
-60
-80
30 36
RESOLUTION BW = 100kHz
VIDEO BW = 100kHz
ATTENUATION = 50dB
RxCLKOUT POWER SPECTRUM
vs. FREQUENCY
(RxCLKIN_ = 33MHz, 2% SPREAD)
MAX9242 toc08
FREQUENCY (MHz)
POWER SPECTRUM (dBm)
33
-40
-30
-20
-10
0
10
20
-50
-70
-60
-80
30 36
RESOLUTION BW = 100kHz
VIDEO BW = 100kHz
ATTENUATION = 50dB
RxCLKOUT POWER SPECTRUM
vs. FREQUENCY
(RxCLKIN_ = 33MHz, 4% SPREAD)
MAX9242 toc09
FREQUENCY (MHz)
POWER SPECTRUM (dBm)
33
-40
-30
-20
-10
0
10
20
-50
-70
-60
-80
30 36
RESOLUTION BW = 100kHz
VIDEO BW = 100kHz
ATTENUATION = 50dB
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P23

MAX9254EUM+TD

Mfr. #:
Buy MAX9254EUM+TD
Manufacturer:
Maxim Integrated
Description:
Serializers & Deserializers - Serdes 21-Bit DC-Balanced Deserialize
Lifecycle:
New from this manufacturer.
Delivery:
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