MAX1452
Registers CONFIG, OTCDAC, and FSOTCDAC are
refreshed from EEPROM.
Registers ODAC and FSODAC are refreshed from
the temperature indexed EEPROM locations.
Calibration Operation, Registers Updated by Serial
Communications
The MAX1452 has not had the Secure-Lock byte
set (CL[7:0] = 00hex) or UNLOCK is high.
Power is applied to the device.
The power-on-reset functions have completed.
The registers can then be loaded from the serial
digital interface by use of serial commands. See the
section on
Serial Interface Command Format
.
Internal EEPROM
The internal EEPROM is organized as a 768 by 8-bit
memory. It is divided into 12 pages, with 64 bytes per
page. Each page can be individually erased. The mem-
ory structure is arranged as shown in Table 1. The look-
up tables for ODAC and FSODAC are also shown, with
the respective temp-index pointer. Note that the ODAC
table occupies a continuous segment, from address
000hex to address 15Fhex, whereas the FSODAC table
is divided in two parts, from 200hex to 2FFhex, and
from 1A0hex to 1FFhex. With the exception of the gen-
eral purpose user bytes, all values are 16-bit wide
words formed by two adjacent byte locations (high byte
and low byte).
The MAX1452 compensates for sensor offset, FSO, and
temperature errors by loading the internal calibration
registers with the compensation values. These compen-
sation values can be loaded to registers directly through
the serial digital interface during calibration or loaded
automatically from EEPROM at power-on. In this way the
device can be tested and configured during calibration
and test and the appropriate compensation values
Low-Cost Precision Sensor
Signal Conditioner
10 ______________________________________________________________________________________
MAX1452
V
IN+
+12V TO +40V
2N2222A
47Ω
100kΩ
4.99kΩ
4.99MΩ
30Ω
100Ω
499kΩ
100kΩ
V
IN-
R
STC
R
ISRC
1.0μF
2.2μF
0.1μF
0.1μF
0.1μF
INM
TEST V
SS
INP
7
9
16
1
2
13
14
15
8
3
BDR
V
DDF
V
DD
5
6
4
FSOTC
ISRC
SENSOR
MAX15006B
OUT
GND
1
D
S
G
5
Z1
IN
2N4392
8
OUT
AMPOUT
AMP-
AMP+
Figure 4. Basic 4–20mA Output, Loop-Powered Configuration
stored in internal EEPROM. The device auto-loads the
registers from EEPROM and be ready for use without fur-
ther configuration after each power-up. The EEPROM is
configured as an 8-bit wide array so each of the 16-bit
registers is stored as two 8-bit quantities. The configura-
tion register, FSOTCDAC and OTCDAC registers are
loaded from the pre-assigned locations in the EEPROM.
MAX1452
Low-Cost Precision Sensor
Signal Conditioner
______________________________________________________________________________________ 11
Table 1. EEPROM Memory Address Map
PAGE
LOW-BYTE
ADDRESS (hex)
HIGH-BYTE
ADDRESS (hex)
TEMP-INDEX[7:0]
(hex)
CONTENTS
000 001 00
0
03E 03F 1F
040 041 20
1
07E 07F 3F
080 081 40
2
0BE 0BF 5F
0C0 0C1 60
3
0FE 0FF 7F
100 101 80
4
13E 13F 9F
140 141 A0
15E 15F AF to FF
ODAC
Lookup Table
160 161 Configuration
162 163 Reserved
164 165 OTCDAC
166 167 Reserved
168 169 FSOTCDAC
16A 16B Control Location
16C 16D
5
17E 17F
180 181
19E 19F
52 General-Purpose
User Bytes
1A0 1A1 80
6
1BE 1BF 8F
1C0 1C1 90
7
1FE 1FF AF to FF
200 201 00
8
23E 23F 1F
240 241 20
9
27E 27F 3F
280 281 40
A
2BE 2BF 5F
2C0 2C1 60
B
2FE 2FF 7F
FSODAC
Lookup Table
MAX1452
The ODAC and FSODAC are loaded from the EEPROM
lookup tables using an index pointer that is a function
of temperature. An ADC converts the integrated tem-
perature sensor output to an 8-bit value every 1ms. This
digitized value is then transferred into the temp-index
register.
The typical transfer function for the temp-index is as fol-
lows:
temp-index = 0.6879
Temperature (°C) + 44.0
where temp-index is truncated to an 8-bit integer value.
Typical values for the temp-index register are given in
Table 6.
Note that the EEPROM is byte wide and the registers
that are loaded from EEPROM are 16 bits wide. Thus
each index value points to two bytes in the EEPROM.
Maxim programs all EEPROM locations to FFhex with
the exception of the oscillator frequency setting and
Secure-Lock byte. OSC[2:0] is in the Configuration
Register (Table 3). These bits should be maintained at
the factory preset values. Programming 00hex in the
Secure-Lock byte (CL[7:0] = 00hex), configures the
DIO as an asynchronous serial input for calibration and
test purposes.
Communication Protocol
The DIO serial interface is used for asynchronous serial
data communications between the MAX1452 and a
host calibration test system or computer. The MAX1452
automatically detects the baud rate of the host comput-
er when the host transmits the initialization sequence.
Baud rates between 4800bps and 38,400bps can be
detected and used regardless of the internal oscillator
frequency setting. Data format is always 1 start bit, 8
data bits, 1 stop bit and no parity. Communications are
only allowed when Secure-Lock is disabled (i.e.,
CL[7:0] = 00hex) or the UNLOCK pin is held high.
Initialization Sequence
Sending the initialization sequence shown below
enables the MAX1452 to establish the baud rate that
initializes the serial port. The initialization sequence is
one byte transmission of 01hex, as follows:
1111111101000000011111111
The first start bit 0 initiates the baud rate synchronization
sequence. The 8 data bits 01hex (LSB first) follow this
and then the stop bit, which is indicated above as a 1,
terminates the baud rate synchronization sequence.
This initialization sequence on DIO should occur after a
period of 1ms after stable power is applied to the
device. This allows time for the power-on-reset function
to complete and the DIO pin to be configured by
Secure-Lock or the UNLOCK pin.
Reinitialization Sequence
The MAX1452 allows for relearning the baud rate. The
reinitialization sequence is one byte transmission of
FFhex, as follows:
11111111011111111111111111
When a serial reinitialization sequence is received, the
receive logic resets itself to its power-up state and
waits for the initialization sequence. The initialization
sequence must follow the reinitialization sequence in
order to re-establish the baud rate.
Serial Interface Command Format
All communication commands into the MAX1452 follow
a defined format utilizing an interface register set (IRS).
The IRS is an 8-bit command that contains both an
interface register set data (IRSD) nibble (4-bit) and an
interface register set address (IRSA) nibble (4-bit). All
internal calibration registers and EEPROM locations are
accessed for read and write through this interface reg-
ister set. The IRS byte command is structured as fol-
lows:
IRS[7:0] = IRSD[3:0], IRSA[3:0]
Where:
IRSA[3:0] is the 4-bit interface register set address
and indicates which register receives the data nib-
ble IRSD[3:0].
IRSA[0] is the first bit on the serial interface after the
start bit.
IRSD[3:0] is the 4-bit interface register set data.
IRSD[0] is the fifth bit received on the serial inter-
face after the start bit.
The IRS address decoding is shown in Table 10.
Special Command Sequences
A special command register to internal logic
(CRIL[3:0]) causes execution of special command
sequences within the MAX1452. These command
sequences are listed as CRIL command codes as
shown in Table 11.
Write Examples
A 16-bit write to any of the internal calibration registers
is performed as follows:
1) Write the 16 data bits to DHR[15:0] using four byte
accesses into the interface register set.
2) Write the address of the target internal calibration
register to ICRA[3:0].
Low-Cost Precision Sensor
Signal Conditioner
12 ______________________________________________________________________________________

MAX1452AAE+T

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Sensor Interface Precision Sensor Signal Conditioner
Lifecycle:
New from this manufacturer.
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