LTC1863LCGN#TRPBF Datasheet LTC1867LIGN#PBF, LTC1867LCGN#PBF, LTC1863LIGN#PBF | P10-P12

LTC1863L/LTC1867L

For more information www.linear.com/LTC1863L

1863l7lfe

Table 2. Channel Configuration (When COM = 1, CH7/COM Pin

Is Used as COMMON)

COM

CHANNEL CONFIGURATION

“+” “–”

0 0 0 1 CH0 CH7/COM

1 0 0 1 1 CH2 CH7/COM

1 0 1 0 1 CH4 CH7/COM

1 0 1 1 1 CH6 CH7/COM

1 1 0 0 1 CH1 CH7/COM

1 1 0 1 1 CH3 CH7/COM

1 1 1 0 1 CH5 CH7/COM

Driving the Analog Inputs

The analog inputs of the LTC1863L/LTC1867L are easy

to drive. Each of the analog inputs can be used as a sin-

gle-ended input relative to the GND pin (CH0-GND, CH1-

GND, etc) or in pairs (CH0

and CH1, CH2 and CH3, CH4

and CH5, CH6 and CH7) for differential inputs. In addi-

tion, CH7 can act as a COM pin for both single-ended

and differential modes if the COM bit in the input word is

high. Regardless of the MUX configuration, the “+” and

“–” inputs are sampled at the same instant. Any unwanted

signal that is common mode to both inputs will be reduced

by the common mode rejection of the sample-and-hold

circuit. The inputs draw only one small current spike

while charging the sample-and-hold capacitors during

the acquire mode. In conversion mode, the analog inputs

draw only a small leakage current. If the source impedance

of the driving circuit is low then the LTC1863L/LTC1867L

inputs can be driven directly. More acquisition time should

be allowed for a higher impedance source.

The following list is a summary of the op amps that are

suitable for driving the LTC1863L/LTC1867L.

1863L7L F01a

CH0

GND

LTC1863L/

LTC1867L

REFCOMP

2000pF

10µF

50Ω

ANALOG

INPUT

1000pF

1863L7L F01b

CH0

CH1

LTC1863L/

LTC1867L

REFCOMP

1000pF

10µF

50Ω

DIFFERENTIAL

ANALOG

INPUTS

Figure 1a. Optional RC Input Filtering for Single-Ended Input Figure 1b. Optional RC Input Filtering for Differential Inputs

1468: 90MHz, 22V/µs 16-bit accurate amplifier

LT1469: Dual LT1468

LT1490A/LT1491A: Dual/quad micropower amplifiers,

50µA/amplifier max, 500µV offset, common mode range

extends 44V above V

–

independent of V

, 3V, 5V and

±15V supplies.

LT1568: Very low noise, active RC filter building block,

cutoff frequency up to 10MHz, 2.7V to ±5V supplies.

LT1638/LT1639: Dual/quad 1.2MHz, 0.4V/µs amplifiers,

230µA per amplifier, 3V, 5V and ±15V supplies.

LT1881/LT1882: Dual and quad, 200pA bias current, rail-

to-rail output op amps, up to ±15V supplies.

LTC1992-2: Gain of 2 fully differential input/output

amplifier/driver, 2.5mV offset, C

LOAD

stable, 2.7V to ±5V

supplies.

LT1995: 30MHz, 1000V/µs gain selectable amplifier, pin

configurable as a difference amplifier, inverting and non-

inverting amplifier, ±2.5V to ±15V supplies.

LTC6912: Dual programmable gain amplifiers with SPI

serial interface, 2mV offset, 2.7V to ±5V supplies.

LTC6915: Zero drift, instrumentation amplifier with SPI

programmable gain, 125dB CMRR, 0.1% gain accuracy,

10µV offset.

Input Filtering

The noise and the distortion of the input amplifier and

other circuitry must be considered since they will add

to the LTC1863L/LTC1867L noise and distortion. Noisy

input circuitry should be filtered prior to the analog inputs

to minimize noise. A simple 1-pole RC filter is sufficient

APPLICATIONS INFORMATION

LTC1863L/LTC1867L

For more information www.linear.com/LTC1863L

1863l7lfe

for many applications. For instance, Figure 1 shows a 50Ω

source resistor and a 2000pF capacitor to ground on the

input will limit the input bandwidth to 1.6MHz. The source

impedance has to be kept low to avoid gain error and

degradation in the AC performance. The capacitor also

acts as a charge reservoir for the input sample-and-hold

and isolates the ADC input from sampling glitch sensitive

circuitry. High quality capacitors and resistors should be

used since these components can add distortion. NPO

and silver mica type dielectric capacitors have excellent

linearity. Carbon surface mount resistors can also gen-

erate distortion from self heating and from damage that

may occur during soldering. Metal film surface mount

resistors are much less susceptible to both problems.

DC Performance

One way of measuring the transition noise associated

with a high resolution ADC is to use a technique where

a DC signal is applied to the input of the ADC and the

resulting output codes are collected over a large number

of conversions. For example, in Figure 2 the distribution

of output codes is shown for a DC input that had been

digitized 4096 times. The distribution is Gaussian and the

RMS code transition noise is about 1.6LSB.

APPLICATIONS INFORMATION

Dynamic Performance

FFT (Fast Fourier Transform) test techniques are used to

test the ADC’s frequency response, distortion and noise

at the rated throughput. By applying a low distortion

sine wave and analyzing the digital output using an FFT

Figure 2. LTC1867L Histogram for 4096 Conversions

Figure 3a. LTC1867L Nonaveraged 4096 Point

FFT Plot with 2.7V Supply

Figure 3b. LTC1867L Nonaveraged 4096 Point

FFT Plot with 3V Supply

CODE

COUNTS

200

400

600

800

1200

24 26 28

1863L7L G12

3021

25 27 29 31

1000

465

1044

895

830

261

170

333

= 2.7V

INTERNAL REF

algorithm, the ADC’s spectral content can be examined

for frequencies outside the fundamental.

Signal-to-Noise Ratio

The Signal-to-Noise and Distortion Ratio (SINAD) is the

ratio between the RMS amplitude of the fundamental input

frequency to the RMS amplitude of all other frequency

components at the A/D output. The output is band limited

to frequencies from above DC and below half the sampling

frequency. Figure 3a shows a typical SINAD of 81.4dB with

a 175kHz sampling rate and a 1kHz input. Higher SINAD

can be obtained with a 3V supply. For example, when an

external 3V is applied to REFCOMP (tie V

REF

to GND), a

SINAD of 83.5dB can be achieved as shown in Figure 3b.

FREQUENCY (kHz)

–60

–40

65.625

1863L7L G03

–80

–100

21.875 43.75 87.5

–120

–140

–20

AMPLITUDE (dB)

SAMPLE

= 175ksps

= 1kHz

SNR = 82.9dB

SINAD = 81.4dB

THD = 86.8dB

FREQUENCY (kHz)

–60

–40

65.625

1863L7L F03b

–80

–100

21.875 43.75 87.5

–120

–140

–20

AMPLITUDE (dB)

SAMPLE

= 175ksps

= 1kHz

SNR = 84.7dB

SINAD = 83.5dB

THD = 90dB

REFCOMP = EXT 3V

LTC1863L/LTC1867L

For more information www.linear.com/LTC1863L

1863l7lfe

Total Harmonic Distortion

Total Harmonic Distortion (THD) is the ratio of the RMS

sum of all harmonics of the input signal to the funda-

mental itself. The out-of-band harmonics alias into the

frequency band between DC and half the sampling fre-

quency. THD is expressed as:

THD = 20log

+ V

...+ V

where V

is the RMS amplitude of the fundamental fre-

quency and V

through V

are the amplitudes of the sec-

ond through Nth harmonics.

Internal Reference

he LTC1863L and LTC1867L have an on-chip, tem-

perature compensated, curvature corrected, bandgap

reference that is factory trimmed to 1.25V. It is internally

connected to a reference amplifier and is available at V

REF

(Pin 10). A 3k resistor is in series with the output so that

it can be easily overdriven by an external reference if bet-

ter drift and/or accuracy are required as shown in Figure

4. The reference amplifier gains the V

REF

voltage by 2x

to 2.5V at REFCOMP (Pin 9). This reference amplifier

APPLICATIONS INFORMATION

compensation pin, REFCOMP, must be bypassed with a

10µF ceramic or tantalum in parallel with a 0.1µF ceramic

for best noise performance.

Digital Interface

The LTC1863L and LTC1867L have a very simple digital

interface that is enabled by the control input, CS/CONV. A

logic rising edge applied to the CS/CONV input will initi

ate a conversion. After the conversion, taking CS/CONV

low will enable the serial port and the ADC will present

digital data in two

’s complement format in bipolar mode

or straight binary format in unipolar mode, through the

SCK/SDO serial port.

Internal Clock

The internal clock is factory trimmed to achieve a typi

cal conversion time of 3.2µs and a maximum conversion

time, 3.7µs, over the full operating temperature range.

The typical acquisition time is 1.68µs, and a throughput

sampling rate of 175ksps is tested and guaranteed.

Automatic Nap Mode

The LTC1863L and LTC1867L go into automatic nap

mode when CS/CONV is held high after the conversion

is complete. With a typical operating current of 750µA

and automatic 170µA nap mode between conversions, the

power dissipation drops with reduced sample rate. The

ADC only keeps the V

REF

and REFCOMP voltages active

when the part is in the automatic nap mode. The slower

the sample rate allows the power dissipation to be lower

(see Figure 5).

Figure 4b. Using the LT1790A-1.25 as an External Reference

Figure 4a. LTC1867L Reference Circuit

Figure 5. Supply Current vs f

SAMPLE

REFERENCE

AMP

10µF

2.2µF

REFCOMP

GND

REF

1.25V

2.5V

LTC1863L/LTC1867L

1863L7L F04a

BANDGAP

REFERENCE

0.1µF10µF

1863L7L F04b

LT1790A-1.25

OUT

REF

LTC1863L/

LTC1867L

GND

REFCOMP

2.2µF

SAMPLE

(ksps)

500

SUPPLY CURRENT (µA)

600

700

800

10 100 1000

1863L7L G09

400

300

200

100

= 2.7V

P1-P3 P4-P6 P7-P9 P10-P12 P13-P15 P16-P16

LTC1863LCGN#TRPBF

Mfr. #:

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Manufacturer:

Analog Devices Inc.

Description:

Analog to Digital Converters - ADC 12-bit, 8-ch. Serial, Micropower ADC

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