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ACST4-7SFP

P1-P3P4-P6P7-P9
ACST4 Series
4/9
The ACST4 device has been designed to switch on & off low power, but highly inductive or resistive loads
such as dishwashers spray pumps, and air-conditioners fan.
Pin COM: Common drive reference to connect to the power line neutral
Pin G: Switch Gate input to connect to the digital controller
Pin OUT: Switch Output to connect to the load
ACST4-7S triggering current has to be sunk from the gate pin G. The switch can then be driven directly by
logic level circuits through a resistor as shown on the typical application diagram ( Fig A ).
Thanks to its thermal and turn off commutation performances, the ACST4 switch is able to drive with no
turn off additional snubber an inductive load up to 4 A.
AC LINE SWITCH BASIC APPLICATION
OUT
COM G
ACST4
ST72 MCU
N
AC
MAINS
L
R
- Vcc
M
LOAD
OUT
L
TYPICAL APPLICATION DIAGRAM (Fig. A)
The ACST4 switch is able to sustain safely the AC line transient voltages either by clamping the low energy
spikes or by breaking over under high energy shocks, even with high turn-on current rises.
The test circuit of the figure 2 is representative of the final ACST application and is also used to stress the
ACST switch according to the IEC 61000-4-5 standard conditions. Thanks to the load, the ACST switch
sustains the voltage spikes up to 2 kV above the peak line voltage. It will break over safely even on resistive
load where the turn on current rate of rise, is as high as shown on figure 3. Such non-repetitive test can be
done 10 times on each AC line voltage polarity.
AC LINE TRANSIENT VOLTAGE RUGGEDNESS
ACST4 Series
5/9
L
R
V
AC
+V
PP
SURGE VOLTAGE
AC LINE & GENERATOR
RG = 220Ω
COM
OUT
G
ACST4
Fig. B: Overvoltage ruggedness test circuit for re-
sistive and inductive loads according to
IEC61000-4-5 standards.
R = 150Ω, L = 10µH, V
PP
= 2kV.
Fig. C: Current and Voltage of the ACST4 dur-
ing IEC61000-4-5 standard test with R,L&V
PP
.
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0
I (A)T(RMS)
α=180°
P(W)
180°
α
α
Fig. 1: Maximum power dissipation versus RMS
on-state current.
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
0 25 50 75 100 125
Tc(°C)
α=180°
DPAK
TO-220FPAB
I (A)T(RMS)
Fig. 2-1: RMS on-state current versus case
temperature.
ACST4 Series
6/9
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
0 25 50 75 100 125
Tamb(°C)
α=180°
Printed circuit board FR4
Natural convection
S=0.5cm²
I (A)T(RMS)
Fig. 2-2: RMS on-state current versus ambient
temperature.
0.01
0.10
1.00
1.E-02 1.E-01 1.E+00 1.E+01 1.E+02 1.E+03
tp(s)
Zth
(j-a)
Zth
(j-c)
DPAK
TO-220FPAB
DPAK
TO-220FPAB
K = [Zth/Rth]
Fig. 3: Relative variation of thermal impedance
versus pulse duration.
0.0
0.5
1.0
1.5
2.0
2.5
3.0
-40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120 130
Tj(°C)
I
GT
I
L
& I
H
I , I , I [Tj] / I , I , I [Tj = 25°C]GTHL GTHL
Fig. 4: Relative variation of gate trigger current,
holding current and latching versus junction
temperature (typical values).
0
1
2
3
4
5
6
7
8
25 50 75 100 125
Tj(°C)
V
out
=460V
dV/dt [Tj] / dV/dt [Tj = 125°C]
Fig. 5: Relative variation of static dV/dt versus
junction temperature.
0.0
0.2
0.4
0.6
0.8
1.0
1.2
0 102030405060708090100
(dV/dt)c(V/µs)
V
out
=300V
ACST4-7C
(dI/dt)c [(dV/dt)c] / Specified (dI/dt)c
Fig. 6-1: Relative variation of critical rate of de-
crease of main current versus reapplied dV/dt
(typical values).
(dI/dt)c [(dV/dt)c] / Specified (dI/dt)c
0.0
0.2
0.4
0.6
0.8
1.0
1.2
0 5 10 15 20 25 30 35 40 45 50
V
out
=300V
ACST4-7S
(dV/dt)c(V/µs)
Fig. 6-2: Relative variation of critical rate of de-
crease of main current versus reapplied dV/dt
(typical values).
P1-P3P4-P6P7-P9

ACST4-7SFP

Mfr. #:
Buy ACST4-7SFP
Manufacturer:
STMicroelectronics
Description:
Triacs 4A 700V AC Power Sw
Lifecycle:
New from this manufacturer.
Delivery:
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