AD8209A Data Sheet
Rev. A | Page 12 of 15
4 mA to 20 mA Current Loop Receiver
The AD8209A can also be used in low current sensing applica-
tions, such as the 4 mA to 20 mA current loop receiver shown
in Figure 28. In such applications, the relatively large shunt
resistor can degrade the common-mode rejection. Adding a
resistor of equal value on the low impedance side of the input
corrects this error.
Figure 28. 4 mA to 20 mA Current Loop Receiver
GAIN ADJUSTMENT
The default gain of the preamplifier and buffer are 7 V/V and
2 V/V, respectively, resulting in a composite gain of 14 V/V. With
the addition of external resistor(s) or trimmer(s), the gain can
be lowered, raised, or finely calibrated.
Gains Less than 14
Because the preamplifier has an output resistance of 100 kΩ, an
external resistor connected from Pin 3 and Pin 4 to GND decreases
the gain by the following factor (see Figure 29):
R
EXT
/(100 kΩ + R
EXT
)
Figure 29. Adjusting for Gains Less than 14
The overall bandwidth is unaffected by changes in gain by using
this method, although there can be a small offset voltage due to
the imbalance in source resistances at the input to the buffer. In
many cases, this offset voltage can be ignored, but if desired, the
offset voltage can be nulled by inserting a resistor in series with
Pin 4. It is recommended that the resistor used be equal to 100 kΩ
minus the parallel sum of R
EXT
and 100 kΩ. For example, with
R
EXT
= 100 kΩ (yielding a composite gain of 7 V/V), the optional
offset nulling resistor is 50 kΩ.
Gains Greater than 14
Connecting a resistor from the output of the buffer amplifier to
its noninverting input, as shown in Figure 30, increases the gain.
The gain is now multiplied by the factor
R
EXT
/(R
EXT
100 kΩ)
For example, it is doubled for R
EXT
= 200 kΩ. Overall gains as high
as 50 are achievable in this way. Note that the accuracy of the gain
becomes critically dependent on the resistor value at high gains.
In addition, the effective input offset voltage at Pin 1 and Pin 8
(which is about six times the actual offset of A1) limits the use of
the device in high gain, dc-coupled applications.
Figure 30. Adjusting for Gains Greater than 14
A small offset voltage arises from an imbalance in source
resistances and the finite bias currents inherently present at the
input of A2. In most applications, this additional offset error is
comparable to the specified offset range and therefore introduces
negligible skew. However, it can be essentially eliminated by the
addition of a resistor in series with the parallel combination of
R
EXT
and 100 kΩ (at Point X in Figure 30) so that the total
resistance is maintained at 100 kΩ. For example, at a gain of 20,
when R
EXT
= 332 kΩ and the parallel combination of R
EXT
and
100 kΩ is 77 kΩ, the series resistor placed at Point X is 23 kΩ.
GND
DNC
–IN
+IN
A1
V
S
A2
OUT
AD8209
A
5V
BA
TTER
Y
10Ω
1%
10Ω
1%
DNC = DO NOT CONNECT
C
F
OUTPUT
+
14511-030
GND
DNC
–IN
+IN
A1
V
S
A2
OUT
AD8209A
5V
V
DIFF
V
CM
DNC = DO NOT CONNECT
R
EXT
OUTPUT
GAIN =
14R
EXT
R
EXT
+ 100kΩ
R
EXT
= 100kΩ
GAIN
14 – GAIN
+
+
145
11-031
GND
DNC
–IN
+IN
A1
V
S
A2
OUT
AD8209A
5V
V
DIFF
V
CM
DNC = DO NOT CONNECT
R
EXT
POINT X
(SEE TEXT)
OUTPUT
GAIN =
14R
EXT
R
EXT
– 100k
R
EXT
= 100k
GAIN
GAIN – 14
+
+
14511-032
Data Sheet AD8209A
Rev. A | Page 13 of 15
GAIN TRIM
Figure 31 shows a method for incremental gain trimming by
using a trim potentiometer and an external resistor, R
EXT
.
The following approximation is useful for small gain ranges:
ΔG ≈ (10 MΩ ÷ R
EXT
)%
For example, using this equation, the adjustment range is ±2%
for R
EXT
= 5 MΩ and ±10% for R
EXT
= 1 MΩ.
Figure 31. Incremental Gain Trimming
Internal Signal Overload Considerations
When configuring the gain for values other than 14, the maximum
input voltage with respect to the supply voltage and ground must
be considered because either the preamplifier or the output buffer
reaches its full-scale output (V
S
0.1 V) with large differential input
voltages. The input of the AD8209A is limited to (V
S
0.1) ÷ 7 for
overall gains of ≤7 because the preamplifier, with its fixed gain of
7 V/V, reaches its full-scale output before the output buffer. For
gains greater than 7, the swing at the buffer output reaches its full
scale first and then limits the AD8209A input to (V
S
0.1) ÷ G,
where G is the overall gain.
LOW-PASS FILTERING
In many transducer applications, it is necessary to filter the signal
to remove spurious high frequency components, including noise,
or to extract the mean value of a fluctuating signal with a peak
to average ratio (PAR) greater than unity. For example, a full wave
rectified sinusoid has a PAR of 1.57, a raised cosine has a PAR
of 2, and a half wave sinusoid has a PAR of 3.14. Signals with
large spikes can have PARs of 10 or more.
When implementing a filter, consider the PAR so that the output of
the AD8209A preamplifier (A1) does not clip before A2; otherwise,
the nonlinearity is averaged and appears as an error at the output.
To avoid this error, both amplifiers clip at the same time. This
condition is achieved when the PAR is no greater than the gain
of the second amplifier (2 for the default configuration). For
example, if a PAR of 5 is expected, increase the gain of A2 to 5.
Low-pass filters can be implemented in several ways by using
the features provided by the AD8209A. In the simplest case, a
single-pole filter (20 dB/decade) is formed when the output
of A1 is connected to the input of A2 via the internal 100 k
resistor by tying Pin 3 to Pin 4 and adding a capacitor from this
node to ground, as shown in Figure 32. If a resistor is added
across the capacitor to lower the gain, the corner frequency
increases; therefore, calculate the gain using the parallel sum
of the resistor and 100 kΩ.
Figure 32. Single-Pole, Low-Pass Filter Using the Internal 100 kΩ Resistor
If the gain is raised using a resistor, as shown in Figure 30, the
corner frequency is lowered by the same factor as the gain is raised.
Therefore, using a resistor of 200 kΩ (for which the gain is
doubled), results in a corner frequency scaled to 0.796 Hz/µF
(0.039 µF for a 20 Hz corner frequency).
Figure 33. Two-Pole, Low-Pass Filter
A two-pole filter with a roll-off of 40 dB/decade can be
implemented using the connections shown in Figure 33. This
configuration is a Sallen-Key form based on a ×2 amplifier. A
two-pole filter with a corner frequency of f
2
and a single-pole filter
with a corner frequency of f
1
have the same attenuation, that is,
40 log (f
2
/f
1
), as shown in Figure 34. Using the standard resistor
value shown in Figure 33 and capacitors of equal values, the corner
frequency is conveniently scaled to 1 Hz/µF (0.05 µF for a 20 Hz
corner frequency). A maximal flat response occurs when the
resistor is lowered to 196 kΩ, scaling the corner frequency to
GND
DNC
–IN
+IN
A1
V
S
A2
R
EXT
OUT
AD8209A
5V
V
DIFF
V
CM
DNC = DO NOT CONNECT
OUTPUT
GAIN TRIM
20kΩ MIN
+
+
14511-033
GND
DNC
–IN
+IN
A1
V
S
A2
OUT
AD8209
A
5V
V
DIFF
V
CM
C
F
DNC = DO NOT CONNECT
OUTPUT
f
C
=
1
2πC10
5
C IN FARADS
+
+
145
11-034
GND
DNC
–IN
+IN
A1
V
S
A2
OUT
AD8209A
5V
V
DIFF
V
CM
C
C
DNC = DO NOT CONNECT
OUTPUT
f
C
(Hz) = 1/C(µF)
255kΩ
+
+
14511-035
AD8209A Data Sheet
Rev. A | Page 14 of 15
1.145 Hz/µF. The output offset is raised by approximately 5 mV
(equivalent to 250 µV at the input pins).
Figure 34. Comparative Responses of Single-Pole and Two-Pole Low-Pass Filters
HIGH LINE CURRENT SENSING WITH LOW-PASS
FILTERING AND GAIN ADJUSTMENT
The circuit shown in Figure 35 is similar to Figure 24, but
includes gain adjustment and low-pass filtering.
A power device that is either on or off controls the current in
the load. The average current is proportional to the duty cycle
of the input pulse and is sensed by a small value resistor. The
average differential voltage across the shunt is typically 100 m V,
although its peak value is higher by an amount that depends on the
inductance of the load and the control frequency. The common-
mode voltage, on the other hand, extends from roughly 1 V above
ground for the on condition to about 1.5 V above the battery
voltage in the off condition. The conduction of the clamping
diode regulates the common-mode potential applied to the device.
For example, a battery spike of 20 V can result in an applied
common-mode potential of 21.5 V to the input of the devices.
To produce a full-scale output of 4 V, a gain of 40 V/V is used,
adjustable by ±5% to absorb the tolerance in the shunt. There is
sufficient headroom to allow 10% overrange (to 4.4 V). The
roughly triangular voltage across the sense resistor is averaged
by a single-pole, low-pass filter that is set with a corner frequency
of 3.6 Hz, which provides about 30 dB of attenuation at 100 Hz.
A higher rate of attenuation can be obtained by using a two-pole
filter with a corner frequency of 20 Hz, as shown in Figure 36.
Although this circuit uses two separate capacitors, the total capaci-
tance is less than half of what is needed for the single-pole filter.
Figure 35. High Line Current Sensor Interface; Gain = 40 V/V, Single-Pole, Low-Pass Filter
Figure 36. Two-Pole Low-Pass Filter
40log (f
2
/f
1
)
f
1
ATTENUATION
f
2
f
2
2
/f
1
FREQUENC
Y
A 1-POLE FILTER, CORNER f
1
, AND
A
2-POLE FI
LTER, CORNER f
2
, HAVE
THE SAME ATTENUATION –40log (f
2
/f
1
)
A
T FREQUENCY
f
2
2
/f
1
20dB/DECADE
40dB/DECADE
14511-036
GND
DNC
–IN
+IN
A1
A2
OUT
AD8209A
5V
INDUCTIVE
LOAD
SWITCH
SHUNT
CLAMP
DIODE
B
ATTER
Y
DNC = DO NOT CONNECT
C
OUTPUT
4V/AMP
5% CALIBRATION RANGE
f
C
(Hz) = 0.767Hz/C(µF)
(0.22µF FOR f
C
= 3.6Hz)
V
OS/IB
NULL
133k
20k
+
14511-037
V
S
GND
DNC
–IN
+IN
A1
V
S
A2
OUT
AD8209A
5V
INDUCTIVE
LOAD
SWITCH
SHUNT
CLAMP
DIODE
B
ATTERY
DNC = DO NOT CONNECT
C
OUTPUT
f
C
(Hz) =1/C(µF)
(0.05µF FOR
f
C
= 20Hz)
93k
432k
C
50k
+
14511-038

AD8209AWBRMZ

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Current Sense Amplifiers Hgh Vltg Precision Diff Amp w/EMI Fltr
Lifecycle:
New from this manufacturer.
Delivery:
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