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DG509ACJ

P1-P3P4-P6P7-P9
DG508A/DG509A
Monolithic CMOS Analog Multiplexers
4 _______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS
(V+ = 15V, V
GND
= 0V, T
A
= T
MIN
to T
MAX
, unless otherwise noted.)
Note 2: I
D(ON)
is leakage from driver into on switch.
Note 3: Off-isolation = 20log
V
S
= input to off switch,
V
D
= output due to V
S
.
Note 4: Electrical characteristics (such as on-resistance) change when power supplies other than ±15V are used.
Note 5: For designs requiring single 5V or dual ±5V operation, refer to Maxim’s improved MAX338 and MAX339. Minimum operating
voltage for DG508ADY/MY and DG509ADY/MY is ±9V.
IV I
IV I
S
D
DG508AA/M
DG509AA/M
DG508AD/E/B/C
DG509AD/E/B/C
PARAMETER SYMBOL CONDITIONS
MIN TYP MAX MIN TYP MAX
UNITS
SWITCH
Analog Signal
Range
V
ANALOG
-15 +15 -15 +15 V
V
D
= 10V,
I
S
= -200μA
500 550
Drain-Source On-
Resistance
R
DS(ON)
Sequence each
switch on,
V
A_L
= 0.8V,
V
A_H
= 2.4V
V
D
= -10V,
I
S
= 200μA
500 550
V
S
= 10V, V
D
= -10V +50 +50
Source Off-Leakage
Current
I
S(OFF)
V
EN
= 0V
V
S
= -10V, V
D
= -10V -50 -50
nA
V
D
= 10V, V
S
= -10V +200 +100
DG508A
V
D
= -10V, V
S
= -10V -200 -200
V
D
= 10V, V
S
= -10V +200 +100
Drain Off-
Leakage
Current
DG509A
I
D(OFF)
V
EN
= 0V
V
D
= -10V, V
S
= -10V -100 -100
nA
V
S(all)
= V
D
= 10V +200 +100
DG508A
V
S(all)
= V
D
= -10V -200 -100
V
S(all)
= V
D
= 10V +100 +100
Drain On-
Leakage
Current
DG509A
I
D(ON)
Sequence each
switch on,
V
A_L
= 0.8V,
V
A_H
= 2.4V
(Note 2)
V
S(all)
= V
D
= -10V -100 -100
nA
LOGIC IN PUT
V
A_
= 2.4V -30 -30
Logic Input Current,
Input Voltage High
I
AH
V
A_
= 15V +30 +30
μA
V
EN
= 2.4V -30 -30
Logic Input Current,
Input Voltage Low
I
AL
All V
A_
= 0V
V
EN
= 0V -30 -30
μA
DG508A/DG509A
Monolithic CMOS Analog Multiplexers
_______________________________________________________________________________________ 5
PIN
DG508A DG509A
DIP/SO DIP/SO
NAME FUNCTION
1, 15, 16 —
A0, A2,
A1
Address Input
— 1, 16 A0, A1 Address Input
2 2 EN Enable
3 3 V-
Negative-Supply Voltage
Input
4–7 — S1–S4
Analog Inputs,
Bidirectional
— 4–7 S1A–S4A
Analog Inputs,
Bidirectional
8 — D
Analog Outputs,
Bidirectional
— 8, 9 DA, DB
Analog Outputs,
Bidirectional
9–12 — S8–S5
Analog Inputs,
Bidirectional
— 10–13 S4B–S1B
Analog Inputs,
Bidirectional
13 14 V+
Positive-Supply Voltage
Input
14 15 GND Ground
Pin Descriptions
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
A0
A1
A2
GND
V+
S5
S6
S7
S8
TOP VIEW
DG508A
EN
V-
S3
S1
S2
S4
D
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
A0
A1
GND
V+
S1B
S2B
S3B
S4B
DB
DG509A
DIP/SO
EN
V-
S3A
S1A
S2A
S4A
DA
Pin Configurations
Functional Diagrams
V+
D
A2 A1 A0 EN
V- GND
S1
S2
S3
S4
S5
S6
S7
S8
DG508A CMOS
DECODE LOGIC
DG508A
8-CHANNEL SINGLE ENDED MULTIPLEXER
V+
DA
A1 A0 EN
V- GND
DB
S1A
S2A
S3A
S4A
S1B
S2B
S3B
S4B
DG509A CMOS
DECODE LOGIC
DG509A
DIFFERENTIAL 4-CHANNEL MULTIPLEXER
DG508A/DG509A
Monolithic CMOS Analog Multiplexers
6 _______________________________________________________________________________________
DG508A
EN S1 ±10V
SWITCH
OUTPUT
V
D
35pF
1MΩ
S2–S7
S8
D
+2.4V +15V
A0
A1
A2
GND
-15V
50Ω
LOGIC
INPUT
V-
V+
DG509A
EN S1 ±10V
SWITCH
OUTPUT
V
DS
35pF
1MΩ
S1A–S4A,
DA, S2B, S3B
S4B
DB
+2.4V +15V
A0
A1
GND
-15V
50Ω
LOGIC
INPUT
V-
V+
Figure 1a. Switching-Time Test Circuit
DG508A
EN
V+
S1 -5V
SWITCH
OUTPUT
V
D
35pF
1kΩ
S2–S7
D
+15V
A0
A1
A2
GND
-15V
50Ω
LOGIC
INPUT
V-
Figure 2a. DG508A Enable-Time Test Circuit
DG509A
EN
V+
S1B -5V
SWITCH
OUTPUT
V
DS
35pF
1kΩ
S1A–S4A,
DA, S2B, S3B
DB
+15V
A0
A1
GND
-15V
50Ω
LOGIC
INPUT
V-
Figure 2b. DG509A Enable-Time Test Circuit
Figure 1b. Switching-Time Test Circuit
P1-P3P4-P6P7-P9

DG509ACJ

Mfr. #:
Buy DG509ACJ
Manufacturer:
Maxim Integrated
Description:
Multiplexer Switch ICs Monolithic CMOS Analog Multiplexers
Lifecycle:
New from this manufacturer.
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