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74ACTQ821SCX

P1-P3P4-P6P7-P7
© 2000 Fairchild Semiconductor Corporation DS010686 www.fairchildsemi.com
March 1990
Revised September 2000
74ACTQ821 Quiet Series
10-Bit D-Type Flip-Flop with 3-STATE Outputs
74ACTQ821
Quiet Series
10-Bit D-Type Flip-Flop
with 3-STATE Outputs
General Description
The ACTQ821 is a 10-bit D-type flip-flop with non-inverting
3-STATE outputs arranged in a broadside pinout. The
ACTQ821 utilizes Fairchild’s Quiet Series
technology to
guarantee quiet output switching and improved dynamic
threshold performance. FACT Quiet Series
features
GTO
output control and undershoot corrector in addition
to a split ground bus for superior performance.
Features
■ Guaranteed simultaneous switching noise level and
dynamic threshold performance
■ Guaranteed pin-to-pin skew AC performance
■ Non-inverting 3-STATE outputs for bus interfacing
■ 4 kV minimum ESD immunity
■ Outputs source/sink 24 mA
Ordering Code:
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbols
IEEE/IEC
Connection Diagram
Pin Descriptions
FACT, Quiet Series, FACT Quiet Series, and GTO are trademarks of Fairchild Semiconductor Corporation.
Order Number Package Number Package Description
74ACTQ821SC M24B 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
74ACTQ821SPC N24C 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Pin Names Description
D
0
–D
9
Data Inputs
O
0
–O
9
Data Outputs
OE
Output Enable Input
CP Clock Input
www.fairchildsemi.com 2
74ACTQ821
Functional Description
The ACTQ821 consists of ten-bit D-type edge-triggered
flip-flops. The buffered Clock (CP) and buffered Output
Enable (OE
) are common to all flip-flops. The flip-flops will
store the state of their individual D inputs that meet the
setup and hold time requirements on the LOW-to-HIGH CP
transition. With OE
LOW the contents of the flip-flops are
available at the outputs. When OE
is HIGH the outputs go
to the high impedance state. Operation of the OE
input
does not affect the state of the flip-flops.
The ACTQ821 is functionally and pin compatible with the
AM29821.
Function Table
H = HIGH Voltage Level
L = LOW Voltage Level
Z = HIGH Impedance
= LOW-to-HIGH Clock Transition
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
Inputs Internal Outputs
Function
OE
CP D Q O
H
L L Z High Z
H
H H Z High Z
L
LL LLoad
L
HH HLoad
3 www.fairchildsemi.com
74ACTQ821
Absolute Maximum Ratings(Note 1) Recommended Operating
Conditions
Note 1: Absolute maximum ratings are those values beyond which damage
to the device may occur. The databook specifications should be met, with-
out exception, to ensure that the system design is reliable over its power
supply, temperature, and output/input loading variables. Fairchild does not
recommend operation of FACT circuits outside databook specifications.
DC Electrical Characteristics
Supply Voltage (V
CC
) − 0.5V to + 7.0V
DC Input Diode Current (I
IK
)
V
I
= − 0.5V − 20 mA
V
I
= V
CC
+ 0.5V + 20 mA
DC Input Voltage (V
I
) − 0.5V to V
CC
+ 0.5V
DC Output Diode Current (I
OK
)
V
O
= − 0.5V − 20 mA
V
O
= V
CC
+ 0.5V + 20 mA
DC Output Voltage (V
O
) − 0.5V to V
CC
+ 0.5V
DC Output Source
or Sink Current (I
O
) ± 50 mA
DC V
CC
or Ground Current
per Output Pin (I
CC
or I
GND
) ± 50 mA
Storage Temperature (T
STG
) − 65°C to + 150°C
DC Latch-Up Source
or Sink Current ± 300 mA
Junction Temperature (T
J
)
PDIP 140
°C
Supply Voltage (V
CC
) 4.5V to 5.5V
Input Voltage (V
I
)0V to V
CC
Output Voltage (V
O
)0V to V
CC
Operating Temperature (T
A
) − 40°C to + 85°C
Minimum Input Edge Rate
∆V/∆t
Minimum Input Edge Rate
∆V/∆t 125 mV/ns
V
IN
from 0.8V to 2.0V
V
CC
@ 4.5V, 5.5V
Symbol Parameter
V
CC
T
A
= + 25°CT
A
= − 40°C to + 85°C
Units Conditions
(V) Typ Guaranteed Limits
V
IH
Minimum HIGH Level 4.5 1.5 2.0 2.0
V
V
OUT
= 0.1V
Input Voltage 5.5 1.5 2.0 2.0 or V
CC
− 0.1V
V
IL
Maximum LOW Level 4.5 1.5 0.8 0.8
V
V
OUT
= 0.1V
Input Voltage 5.5 1.5 0.8 0.8 or V
CC
− 0.1V
V
OH
Minimum HIGH Level 4.5 4.49 4.4 4.4
VI
OUT
= − 50 µA
Output Voltage 5.5 5.49 5.4 5.4
V
IN
= V
IL
or V
IH
4.5 3.86 3.76 V I
OH
= − 24 mA
5.5 4.86 4.76 I
OH
= − 24 mA (Note 2)
V
OL
Maximum LOW Level 4.5 0.001 0.1 0.1
VI
OUT
= 50 µA
Output Voltage 5.5 0.001 0.1 0.1
V
IN
= V
IL
or V
IH
4.5 0.36 0.44 V I
OL
= 24 mA
5.5 0.36 0.44 I
OL
= 24 mA (Note 2)
I
IN
Maximum Input
5.5 ±0.1 ±1.0 µA
V
I
= V
CC
,
Leakage Current GND
I
OZ
Maximum 3-STATE
5.5 ±0.5 ±5.0 µA
V
I
= V
IL
, V
IH
Leakage Current V
O
= V
CC
, GND
I
CCT
Maximum I
CC
/Input 5.5 0.6 1.5 mA V
I
= V
CC
− 2.1V
I
OLD
Minimum Dynamic 5.5 75 mA V
OLD
= 1.65V Max
I
OHD
Output Current (Note 3) 5.5 −75 mA V
OHD
= 3.85V Min
I
CC
Maximum Quiescent
5.5 8.0 80.0 µA
V
IN
= V
CC
Supply Current or GND
V
OLP
Quiet Output
5.0 1.1 1.5 V
Figure 1, Figure 2
Maximum Dynamic V
OL
(Note 4)(Note 5)
V
OLV
Quiet Output
5.0 − 0.6 − 1.2 V
Figure 1, Figure 2
Minimum Dynamic V
OL
(Note 4)(Note 5)
V
IHD
Minimum HIGH Level
5.0 1.9 2.2 V (Note 4)(Note 6)
Dynamic Input Voltage
V
ILD
Maximum LOW Level
5.0 1.2 0.8 V (Note 4)(Note 6)
Dynamic Input Voltage
P1-P3P4-P6P7-P7

74ACTQ821SCX

Mfr. #:
Buy 74ACTQ821SCX
Manufacturer:
ON Semiconductor
Description:
IC FF D-TYPE SNGL 10BIT 24SOIC
Lifecycle:
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