ICS508M

DATASHEET
PECL TO CMOS CONVERTER ICS508
IDT™ / ICS™
PECL TO CMOS CONVERTER 1
ICS508 REV G 092209
Description
The ICS508 is the most cost effective way to generate
a high quality, high frequency CMOS clock output from
a PECL clock input.
The ICS508 has separate VDD supplies for the PECL
input buffer and the output buffer, allowing different
voltages to be used. For example, the input clock could
use a 3.3 V supply while the output operates from 2.5V.
The device has an Output Enable pin that tri-states the
clock output when the OE pin is taken low.
The ICS508 is a member of IDT’s ClockBlocks
TM
family.
Features
Packaged in 8 pin SOIC or die
Separate VDD supplies allow voltage translation
Clock frequency of 0 - 250 MHz
Duty cycle of 45/55
Operating voltages of 2.375 to 5.5V
Tri-state output for board level testing
24mA output drive capability
Industrial temperature version available
Advanced, low power, sub-micron CMOS process
NOTE: EOL for non-green parts to occur on
5/13/10 per PDN U-09-01
Block Diagram
CLK
Output
Buffer
VDDCVDDP
GND
GNDOE
PECLIN
PECLIN
ICS508
PECL TO CMOS CONVERTER PECL TO CMOS TRANSLATOR
IDT™ / ICS™
PECL TO CMOS CONVERTER 2
ICS508 REV G 092209
Pin Assignment
Pin Descriptions
External Components
The ICS508 requires two 0.01µF decoupling capacitors to be connected between VDDP and GND and
between VDDC and GND. They must be connected close to the ICS508 to minimize lead inductance. A
33 series terminating resistor can be used next to the CLK pin.
VDDP
PECLIN
PECLIN
CLK
GND
GND
OE
VDDC1
2
3
4
8
7
6
5
8 Pin (150 mil) SOIC
Pin
Number
Pin
Name
Pin
Type
Pin Description
1 VDDP Output Connect to 3.3V or 5V. Supplies PECL input buffer.
2PECLIN
Input Complementary PECL clock input.
3 PECLIN Input PECL clock input.
4 GND Power Connect to ground.
5 OE Input Output enable. Tri-states CLK output when low. Internal pull-up to
VDDC.
6 GND Power Connect to ground.
7 CLK Output Clock output.
8 VDDC Power Connect to 2.5 V, or 3.3 V, or 5 V. Supplies output buffer and OE pin.
ICS508
PECL TO CMOS CONVERTER PECL TO CMOS TRANSLATOR
IDT™ / ICS™
PECL TO CMOS CONVERTER 3
ICS508 REV G 092209
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the ICS508. These ratings, which
are standard values for IDT commercially rated parts, are stress ratings only. Functional operation of the
device at these or any other conditions above those indicated in the operational sections of the
specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can
affect product reliability. Electrical parameters are guaranteed only over the recommended operating
temperature range.
Recommended Operation Conditions
DC Electrical Characteristics
VDDP = VDDC =3.3V ±5% , Ambient temperature 0 to +70° C, unless stated otherwise
Item Rating
Supply Voltage, VDDP and VDDC 7 V
PECL Inputs -0.5 V to VDDP+0.5 V
Clock Output and OE Pin -0.5 V to VDDC+0.5 V
Ambient Operating Temperature, ICS508 0 to +70° C
Ambient Operating Temperature, ICS508MI -40 to +85° C
Storage Temperature -65 to +150° C
Soldering Temperature 260° C
Parameter Min. Typ. Max. Units
Ambient Operating Temperature, ICS508M 0 +70 ° C
Ambient Operating Temperature, ICS508MI -40 +85 ° C
Power Supply Voltage (measured in respect to GND) +3.15 +3.45 V
Reference crystal parameters Refer to page 3
Parameter Symbol Conditions Min. Typ. Max. Units
Operating Voltage VDD VDDP 3 5.5 V
VDD VDDC 2.375 5.5 V
Peak to Peak Input Voltage PECLIN 0.3 1 V
Common Mode Range PECLIN
VDDP = 5 V
VDDP - 3.7 VDDP - 0.6 V
PECLIN
VDDP = 3.3 V
VDDP - 2.0 VDDP - 0.6 V
Input High Voltage V
IH
OE only 2 VDDC V
Input Low Voltage V
IL
OE only 0.8 V

ICS508M

Mfr. #:
Manufacturer:
Description:
IC PECL-CMOS CONVERTER 8-SOIC
Lifecycle:
New from this manufacturer.
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