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MC33178DMR2G

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P19
MC33178, MC33179
http://onsemi.com
10
Figure 28. Input Referred Noise Voltage
versus Frequency
Figure 29. Input Referred Noise Current
versus Frequency
Figure 30. Percent Overshoot versus
Load Capacitance
Figure 31. Non−inverting Amplifier Slew Rate
Figure 32. Small Signal Transient Response Figure 33. Large Signal Transient Response
t, TIME (2.0 ms/DIV)
t, TIME (5.0 ms/DIV)
V
CC
= +15 V
V
EE
= −15 V
A
V
= +1.0
R
L
= 600 W
C
L
= 100 pF
T
A
= 25°C
t, TIME (2.0 ns/DIV)
V
O
f, FREQUENCY (Hz)
10 100 1.0 k 10 k 10 k
e, INPUT REFERRED NOISE VOLTAGE ()
n
nV/ Hz√
V
CC
= +15 V
V
EE
= −15 V
T
A
= 25°C
f, FREQUENCY (Hz)
i, INPUT REFERRED NOISE CURRENT ()
n
10 100 1.0 k 10 k 100 k
V
CC
= +15 V
V
EE
= −15 V
T
A
= 25°C
pA/ Hz√
C
L
, LOAD CAPACITANCE (pF)
PERCENT OVERSHOOT (%)
10 100 1.0 k 10 k
V
CC
= +15 V
V
EE
= −15 V
T
A
= 25°C
R
L
= 600 W
R
L
= 2.0 kW
V
CC
= +15 V
V
EE
= −15 V
A
V
= +1.0
R
L
= 600 W
C
L
= 100 pF
T
A
= 25°C
V
CC
= +15 V
V
EE
= −15 V
A
V
= +1.0
R
L
= 600 W
C
L
= 100 pF
T
A
= 25°C
, OUTPUT VOLTAGE (50 mV/DIV)
V
O
, OUTPUT VOLTAGE (5.0 V/DIV) V
O
, OUTPUT VOLTAGE (5.0 V/DIV)
20
18
16
14
12
10
8.0
6.0
4.0
2.0
0
0.5
0.4
0.3
0.2
0.1
0
100
90
80
70
60
50
40
30
20
10
0
Input Noise Voltage Test
Circuit
+
V
O
−
V
O
Input Noise Current Test Circuit
R
S
(R
S
= 10 kW)
+
−
MC33178, MC33179
http://onsemi.com
11
10 k
A1
To
Receiver
+
−
1.0 mF
300
200 k
120 k
2.0 k A2
820
1N4678
Tip
Phone Line
Ring
A3
V
R
From
Microphone
−
−
+
+
10 k
10 k
10 k
V
R
10 k
0.05 mF
Figure 34. Telephone Line Interface Circuit
APPLICATION INFORMATION
This unique device uses a boosted output stage to combine
a high output current with a drain current lower than similar
bipolar input op amps. Its 60° phase margin and 15 dB gain
margin ensure stability with up to 1000 pF of load
capacitance (see Figure 24). The ability to drive a minimum
600 W load makes it particularly suitable for telecom
applications. Note that in the sample circuit in Figure 34
both A2 and A3 are driving equivalent loads of
approximately 600 W.
The low input offset voltage and moderately high slew
rate and gain bandwidth product make it attractive for a
variety of other applications. For example, although it is not
single supply (the common mode input range does not
include ground), it is specified at +5.0 V with a typical
common mode rejection of 110 dB. This makes it an
excellent choice for use with digital circuits. The high
common mode rejection, which is stable over temperature,
coupled with a low noise figure and low distortion, is an
ideal op amp for audio circuits.
The output stage of the op amp is current limited and
therefore has a certain amount of protection in the event of
a short circuit. However, because of its high current output,
it is especially important not to allow the device to exceed
the maximum junction temperature, particularly with the
MC33179 (quad op amp). Shorting more than one amplifier
could easily exceed the junction temperature to the extent of
causing permanent damage.
Stability
As usual with most high frequency amplifiers, proper lead
dress, component placement, and PC board layout should be
exercised for optimum frequency performance. For
example, long unshielded input or output leads may result in
unwanted input/output coupling. In order to preserve the
relatively low input capacitance associated with these
amplifiers, resistors connected to the inputs should be
immediately adjacent to the input pin to minimize additional
stray input capacitance. This not only minimizes the input
pole frequency for optimum frequency response, but also
minimizes extraneous “pick up” at this node. Supplying
decoupling with adequate capacitance immediately adjacent
to the supply pin is also important, particularly over
temperature, since many types of decoupling capacitors
exhibit great impedance changes over temperature.
Additional stability problems can be caused by high load
capacitances and/or a high source resistance. Simple
compensation schemes can be used to alleviate these
effects.
MC33178, MC33179
http://onsemi.com
12
If a high source of resistance is used (R1 > 1.0 kW), a
compensation capacitor equal to or greater than the input
capacitance of the op amp (10 pF) placed across the
feedback resistor (see Figure 35) can be used to neutralize
that pole and prevent outer loop oscillation. Since the closed
loop transient response will be a function of that
capacitance, it is important to choose the optimum value for
that capacitor. This can be determined by the following
Equation:
(1)
C
C
+ (1 ) [R1ńR2])
2
C
L
(Z
O
ńR
2
)
where: Z
O
is the output impedance of the op amp.
For moderately high capacitive loads (500 pF < C
L
< 1500 pF) the addition of a compensation resistor on the
order of 20 W between the output and the feedback loop will
help to decrease miller loop oscillation (see Figure 36). For
high capacitive loads (C
L
> 1500 pF), a combined
compensation scheme should be used (see Figure 37). Both
the compensation resistor and the compensation capacitor
affect the transient response and can be calculated for
optimum performance. The value of C
C
can be calculated
using Equation 1. The Equation to calculate R
C
is as follows:
(2)
R
C
+ Z
O
R1ńR2
Figure 35. Compensation for
High Source Impedance
Figure 36. Compensation Circuit for
Moderate Capacitive Loads
Figure 37. Compensation Circuit for
High Capacitive Loads
R2
−
+
R1
Z
L
C
C
R2
R
C
C
L
R1
−
+
R2
C
C
R
C
C
L
R1
−
+
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P19

MC33178DMR2G

Mfr. #:
Buy MC33178DMR2G
Manufacturer:
ON Semiconductor
Description:
Operational Amplifiers - Op Amps 2-18V Dual Low Power Industrial Temp
Lifecycle:
New from this manufacturer.
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