PESD5V0S1UA_PESD12VS1UA_1 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 01 — 9 February 2009 9 of 14
NXP Semiconductors
PESD5V0S1UA; PESD12VS1UA
Unidirectional ESD protection for transient voltage suppression
8. Application information
PESD5V0S1UA and PESD12VS1UA are designed for the protection of one unidirectional
data or signal line from the damage caused by ESD and transient overvoltage.
The devices may be used on lines where the signal polarities are either positive or
negative with respect to ground.
The PESD5V0S1UA provides a surge capability of 890 W and the PESD12VS1UA
provides a surge capability of 600 W per line for an 8/20 µs waveform.
Circuit board layout and protection device placement
Circuit board layout is critical for the suppression of ESD and Electrical Fast
Transient (EFT). The following guidelines are recommended:
1. Place the device as close to the input terminal or connector as possible.
2. The path length between the device and the protected line should be minimized.
3. Keep parallel signal paths to a minimum.
4. Avoid running protected conductors in parallel with unprotected conductors.
5. Minimize all Printed-Circuit Board (PCB) conductive loops including power and
ground loops.
6. Minimize the length of the transient return path to ground.
7. Avoid using shared transient return paths to a common ground point.
8. Ground planes should be used whenever possible. For multilayer PCBs, use ground
vias.
Fig 9. Application diagram
006aab251
GND
line to be protected
(positive signal polarity)
DUT
unidirectional protection of one line
GND
line to be protected
(negative signal polarity)
DUT
