AD261AND-2

AD261
–3–
REV. 0
WARNING!
ESD SENSITIVE DEVICE
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD261 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
ABSOLUTE MAXIMUM RATINGS*
Parameter Conditions Min Typ Max Units
Supply Voltage (+5 V dc
SYS & FLD
) –0.5 +6.0 V
DC Input Voltage (V
IN MAX
) Referred to +5 V dc
SYS & FLD
and 5 V RTN
SYS & FLD
Respectively –0.5 +0.5 V
DC Output Voltage (V
OUT MAX
) Referred to +5 V RTN
SYS & FLD
and 5 V dc
SYS & FLD
Respectively –0.5 +0.5 V
Clamp Diode Input Current (I
IK
) For V
I
< –0.5 V or V
I
> 5 V RTN
SYS & FLD
+0.5 V –25 +25 mA
Clamp Diode Output Current (I
OK
) For V
O
< –0.5 V or V
O
> 5 V RTN
SYS & FLD
+0.5 V –25 +25 mA
Output DC Current, per Pin (I
OUT
) –25 +25 mA
DC Current, V
CC
or GND (I
CC
or I
GND
) –50 +50 mA
Storage Temperature (T
STG
) 40 +85 °C
Lead Temperature (Soldering, 10 sec) +300 °C
Electrostatic Protection (V
ESD
) Per MIL-STD-883, Method 3015 4.5 5
kV
*Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device
at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum ratings for extended
periods may effect device reliability.
I/O CONFIGURATIONS AVAILABLE
The AD261 is available in several configurations. The choice of
model is determined by the desired number of input vs. output
lines. All models have identical footprints with the power and
enable pins always being in the same locations.
PIN CONFIGURATION
15
16
17
18
19
20
21
22
1
2
3
4
5
6
7
8
SYSTEM
FIELD
BOTTOM VIEW
S0
S1
S2
S3
S4
ENABLE
SYS
+5V dc
SYS
5V RTN
SYS
5V RTN
FLD
+5V dc
FLD
ENABLE
FLD
F0
F1
F2
F3
F4
ORDERING GUIDE
Model Isolation Package Package
Number Description Ratings Description Option
AD261AND-0 0 Inputs, 5 Outputs 1.75 kV rms Plastic DIP ND-22A
AD261AND-1 1 Input, 4 Outputs 1.75 kV rms Plastic DIP ND-22A
AD261AND-2 2 Inputs, 3 Outputs 1.75 kV rms Plastic DIP ND-22A
AD261AND-3 3 Inputs, 2 Outputs 1.75 kV rms Plastic DIP ND-22A
AD261AND-4 4 Inputs, 1 Output 1.75 kV rms Plastic DIP ND-22A
AD261AND-5 5 Inputs, 0 Outputs 1.75 kV rms Plastic DIP ND-22A
AD261BND-0 0 Inputs, 5 Outputs 3.5 kV rms Plastic DIP ND-22A
AD261BND-1 1 Input, 4 Outputs 3.5 kV rms Plastic DIP ND-22A
AD261BND-2 2 Inputs, 3 Outputs 3.5 kV rms Plastic DIP ND-22A
AD261BND-3 3 Inputs, 2 Outputs 3.5 kV rms Plastic DIP ND-22A
AD261BND-4 4 Inputs, 1 Output 3.5 kV rms Plastic DIP ND-22A
AD261BND-5 5 Inputs, 0 Outputs 3.5 kV rms Plastic DIP ND-22A
PIN FUNCTION DESCRIPTIONS
Pin Mnemonic Function
1–5* S0 Through S4 Digital Xmt or Rcv from F0 Through F4
6 ENABLE
SYS
System Output Enable/Three-State
7 +5 V dc
SYS
System Power Supply (+5 V dc Input)
8 5 V RTN
SYS
System Power Supply Common
9–14 Not Present On Unit
15 5 V RTN
FLD
Field Power Supply Common
16 +5 V dc
FLD
Field Power Supply (+5 V Input)
17 ENABLE
FLD
Field Output Enable/Three-State
18–22* F0 Through F4 Digital Xmt or Rcv from S0 Through S4
*Function of pin determined by model. Refer to Table I.
AD261
–4–
REV. 0
SYSTEMFIELD
S0
F3
+5V dc
5V dc RTN
+5V dc
5V dc RTN
S1
2
S2
3
S3
S4
F0
F1
F2
F4
15
16
17
6
7
8
4
5
AD261-0
THREE-
STATE
LATCH
E
D
LINE 0
+5V dc
FLD
5V RTN
FLD
ENABLE
FLD
5V RTN
SYS
+5V dc
SYS
ENABLE
SYS
THREE-
STATE
LATCH
E
D
LINE 1
THREE-
STATE
LATCH
E
D
THREE-
STATE
LATCH
E
D
THREE-
STATE
LATCH
E
D
LINE 2
LINE 3
LINE 4
FIELD
AD261-1
S0
F3
SYSTEM
+5V dc
5V dc RTN
+5V dc
5V dc RTN
S1
2
S2
3
S3
S4
F0
F1
F2
F4
15
16
17
6
7
8
4
5
THREE-
STATE
LATCH
E
D
LINE 0
+5V dc
FLD
5V RTN
FLD
ENABLE
FLD
5V RTN
SYS
+5V dc
SYS
ENABLE
SYS
THREE-
STATE
LATCH
E
D
LINE 1
THREE-
STATE
LATCH
E
D
LINE 2
LATCH
E
D
THREE-
STATE
LINE 4
THREE-
STATE
LATCH
E
D
LINE 3
AD261 CONFIGURATIONS
AD261-2
S0
F3
SYSTEM
FIELD
+5V dc
5V dc RTN
+5V dc
5V dc RTN
S1
2
S2
3
S3
S4
F0
F1
F2
F4
15
16
17 6
7
8
5
THREE-
STATE
LATCH
E
D
LINE 0
+5V dc
FLD
5V RTN
FLD
ENABLE
FLD
5V RTN
SYS
+5V dc
SYS
ENABLE
SYS
THREE-
STATE
LATCH
E
D
LINE 1
THREE-
STATE
LATCH
E
D
LINE 2
LATCH
E
D
THREE-
STATE
LINE 4
LINE 3
LATCH
E
D
THREE-
STATE
4
AD261-3
S0
F3
SYSTEM
FIELD
+5V dc
5V dc RTN
+5V dc
5V dc RTN
S1
2
S2
S3
S4
F0
F1
F2
F4
15
16
17 6
7
8
5
THREE-
STATE
LATCH
E
D
LINE 0
+5V dc
FLD
5V RTN
FLD
ENABLE
FLD
5V RTN
SYS
+5V dc
SYS
ENABLE
SYS
THREE-
STATE
LATCH
E
D
LINE 1
LATCH
E
D
THREE-
STATE
LINE 4
LINE 3
LATCH
E
D
THREE-
STATE
4
LATCH
E
D
THREE-
STATE
LINE 2
3
AD261
–5–
REV. 0
AD261-4
S0
F3
SYSTEM
FIELD
+5V dc
5V dc RTN
+5V dc
5V dc RTN
S1
S2
S3
S4
F0
F1
F2
F4
15
16
17 6
7
8
5
THREE-
STATE
LATCH
E
D
LINE 0
+5V dc
FLD
5V RTN
FLD
ENABLE
FLD
5V RTN
SYS
+5V dc
SYS
ENABLE
SYS
LATCH
E
D
THREE-
STATE
LINE 4
LINE 3
LATCH
E
D
THREE-
STATE
4
LATCH
E
D
THREE-
STATE
LINE 2
3
LATCH
E
D
THREE-
STATE
LINE 1
2
AD261-5
S0
F3
SYSTEM
FIELD
+5V dc
5V dc RTN
+5V dc
5V dc RTN
S1
S2
S3
S4
F0
F1
F2
F4
15
16
17 6
7
8
5
+5V dc
FLD
5V RTN
FLD
ENABLE
FLD
5V RTN
SYS
+5V dc
SYS
ENABLE
SYS
LATCH
E
D
THREE-
STATE
LINE 4
LINE 3
LATCH
E
D
THREE-
STATE
4
LATCH
E
D
THREE-
STATE
LINE 2
3
LATCH
E
D
THREE-
STATE
LATCH
E
D
THREE-
STATE
2
LINE 0
LINE 1
AD261 CONFIGURATIONS
(Continued from page 1)
Field and System Enable Functions: Both the isolated and
nonisolated sides of the AD261 have ENABLE pins that three-
state all outputs. Upon reenabling these pins, all outputs are
updated to reflect the current input logic level.
CE Certifiable: Simply by adding the external bypass capacitors
at the supply pins, the AD261 can attain CE certification in
most applications (to the EMC directive) and conformance to
the low voltage (safety) directive is assured by the EN60950
certification.
GENERAL ATTRIBUTES
The AD261 provides five HCMOS compatible isolated logic
lines with 10 kV/µs common-mode transient immunity.
The case design and pin arrangement provides greater than
18 mm spacing between field and system side conductors, pro-
viding CSA/IS and IEC creepage spacing consistent with 750 V
mains isolation.
The five unidirectional logic lines have six possible combina-
tions of “ins” and “outs,” or transmitter/receiver pairs; hence
there are six AD261 part configurations (see Table I).
Each 20 MHz logic line
has a Schmidt trigger input and a three-
state output (on the other side of the isolation barrier) and 14 ns of
propagation delay. A single enable pin on either side of the
barrier causes all outputs on that side to go three-state and all
inputs (driven pins) to ignore their inputs and retain their last
known state.
Note: All unused logic inputs (1–5) should be tied either high or low,
but not left floating.
Edge “fidelity,” or the difference in propagation time for rising
and falling edges, is typically less than ±1 ns.
Power consumption, unlike opto-isolators, is a function of operat-
ing frequency. Each logic line barrier driver requires about 160 µA
per MHz and each receiver 40 µA per MHz plus, of course, 4 mA
total idle current (each side). The supply current diminishes
slightly with increasing temperature (about –0.03%/°C).
The total capacitance spanning the isolation barrier is less than
10 pF.
The minimum period of a pulse that can be accurately coupled
across the barrier is about 25 ns. Therefore the maximum
square-wave frequency of operation is 20 MHz.
Table I. Model Number and Pinout Function
Pin AD261-0 AD261-1 AD261-2 AD261-3 AD261-4 AD261-5
1 S0 (Xmt) S0 (Xmt) S0 (Xmt) S0 (Xmt) S0 (Xmt) S0 (Rcv)
2 S1 (Xmt) S1 (Xmt) S1 (Xmt) S1 (Xmt) S1 (Rcv) S1 (Rcv)
3 S2 (Xmt) S2 (Xmt) S2 (Xmt) S2 (Rcv) S2 (Rcv) S2 (Rcv)
4 S3 (Xmt) S3 (Xmt) S3 (Rcv) S3 (Rcv) S3 (Rcv) S3 (Rcv)
5 S4 (Xmt) S4 (Rcv) S4 (Rcv) S4 (Rcv) S4 (Rcv) S4 (Rcv)
6 ENABLE
SYS
*****
7 +5 V dc
SYS
*****
8 5 V RTN
SYS
*****
9–14 Not Present
15 5 V RTN
FLD
*** *
16 +5 V dc
FLD
*****
17 ENABLE
FLD
*****
18 F0 (Rcv) F0 (Rcv) F0 (Rcv) F0 (Rcv) F0 (Rcv) F0 (Xmt)
19 F1 (Rcv) F1 (Rcv) F1 (Rcv) F1 (Rcv) F1 (Xmt) F1 (Xmt)
20 F2 (Rcv) F2 (Rcv) F2 (Rcv) F2 (Xmt) F2 (Xmt) F2 (Xmt)
21 F3 (Rcv) F3 (Rcv) F3 (Xmt) F3 (Xmt) F3 (Xmt) F3 (Xmt)
22 F4 (Rcv) F4 (Xmt) F4 (Xmt) F4 (Xmt) F4 (Xmt) F4 (Xmt)
*Pin function is the same on all models, as shown in the AD261-0 column.

AD261AND-2

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Digital Isolators IC High Spd High VTG Data Bus Iso
Lifecycle:
New from this manufacturer.
Delivery:
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