__________Applications Information
Overvoltage Protection
Proper power-supply sequencing is recommended for
all CMOS devices. Do not exceed the absolute maxi-
mum ratings, because stresses beyond the listed rat-
ings may cause permanent damage to the devices.
Always sequence V+ on first, followed by the logic
inputs. If power-supply sequencing is not possible, add
two small signal diodes in series with supply pins for
overvoltage protection (Figure 1). Adding diodes
reduces the analog signal range to 1V below V+ and
1V above GND, but low switch resistance and low leak-
age characteristics are unaffected. Device operation is
unchanged, and the difference between V+ and GND
should not exceed 17V.
MAX4066/MAX4066A
Low-Cost, Low-Voltage, Quad, SPST,
CMOS Analog Switches
_______________________________________________________________________________________ 7
______________________________________________________________Pin Description
Ground87
Positive Supply Voltage1614
Logic Control Inputs15, 6, 7, 1413, 5, 6, 12
Not internally connected3, 11
Analog Switch Common Terminal (bidirectional)2, 5, 10, 122, 4, 9, 10
Analog Switch Normally Open Terminal (bidirectional)1, 4, 9, 131, 3, 8, 11
GND
V+
IN1–IN4
N.C.
COM1–COM4
NO1–NO4
PIN
FUNCTION
DIP/SO QSOP
NAME
POSITIVE SUPPLY
COM
NO
V
g
V+
MAX4066
MAX4066A
Figure 1. Overvoltage Protection Using Two External Blocking
Diodes
MAX4066/MAX4066A
Low-Cost, Low-Voltage, Quad, SPST,
CMOS Analog Switches
8 _______________________________________________________________________________________
t
R
< 20ns
t
F
< 20ns
50%
0V
LOGIC
INPUT
R
L
300
NO
GND
C
L
INCLUDES FIXTURE AND STRAY CAPACITANCE.
V
OUT
= V
COM (
R
L
)
R
L
+ R
ON
SWITCH
INPUT
IN
V
INH
t
OFF
0V
COM
SWITCH
OUTPUT
0.9 x V
0UT
0.9 x V
OUT
t
ON
V
OUT
SWITCH
OUTPUT
LOGIC
INPUT
V+
C
L
35pF
V+
V
OUT
V
COM
0V
MAX4066
MAX4066A
Figure 2. Switching Time
V
GEN
GND
NO
C
L
V
OUT
V+
V
OUT
V
OUT
Q = (V
OUT
)(C
L
)
COM
OFF
ON
OFF
IN
V
IN
V+
R
GEN
IN
MAX4066
MAX4066A
Figure 3. Charge Injection
______________________________________________Test Circuits/Timing Diagrams
MAX4066/MAX4066A
Low-Cost, Low-Voltage, Quad, SPST,
CMOS Analog Switches
_______________________________________________________________________________________ 9
IN
V
INL
OR
V
INH
SIGNAL
GENERATOR 0dBm
V+
10nF
ANALYZER
NO
R
L
GND
COM
COM
V+
MAX4066
MAX4066A
Figure 4. Off Isolation/On-Channel Bandwidth
SIGNAL
GENERATOR 0dBm
V+
10nF
ANALYZER
N02
R
L
GND
COM1
IN1
N01
50
COM2
IN2
V+
MAX4066
MAX4066A
V
INL
OR
V
INH
V
INL
OR
V
INH
Figure 5. Crosstalk
CAPACITANCE
METER
NO
COM
GND
IN
10nF
V+
f = 1MHz
V+
MAX4066
MAX4066A
V
INL
OR
V
INH
Figure 6. Channel Off/On Capacitance
____________________________________________________Test Circuits (continued)

MAX4066ESD

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Analog Switch ICs Low-Cost, Low-Voltage, Quad, SPST, CMOS Analog Switch
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union