LTC3865EUH-1#TRPBF Datasheet LTC3865EUH-1#PBF, LTC3865IUH#PBF, LTC3865IUH-1#PBF | P13-P15

LTC3865/LTC3865-1

3865fb

pin to a DC voltage below 0.6V (e.g., SGND). To select

pulse-skipping mode of operation, tie the MODE/PLLIN

pin to INTV

. To select Burst Mode operation, ﬂ oat the

MODE/PLLIN pin. When a controller is enabled for Burst

Mode operation, the peak current in the inductor is set to

approximately one-third of the maximum sense voltage

even though the voltage on the I

pin indicates a lower

value. If the average inductor current is higher than the

load current, the error ampliﬁ er EA will decrease the voltage

on the I

pin. When the I

voltage drops below 0.5V, the

internal sleep signal goes high (enabling “sleep” mode)

and both external MOSFETs are turned off.

In sleep mode, the load current is supplied by the output

capacitor. As the output voltage decreases, the EA’s output

begins to rise. When the output voltage drops enough, the

sleep signal goes low, and the controller resumes normal

operation by turning on the top external MOSFET on the

next cycle of the internal oscillator. When a controller is

enabled for Burst Mode operation, the inductor current is

not allowed to reverse. The reverse current comparator

REV

) turns off the bottom external MOSFET just before the

inductor current reaches zero, preventing it from revers-

ing and going negative. Thus, the controller operates in

discontinuous operation. In forced continuous operation,

the inductor current is allowed to reverse at light loads or

under large transient conditions. The peak inductor cur-

rent is determined by the voltage on the I

pin, just as

in normal operation. In this mode, the efﬁ ciency at light

loads is lower than in Burst Mode operation. However,

continuous mode has the advantages of lower output

ripple and less interference with audio circuitry.

When the MODE/PLLIN pin is connected to INTV

, the

LTC3865 operates in PWM pulse-skipping mode at light

loads. At very light loads, the current comparator, I

CMP

may remain tripped for several cycles and force the external

top MOSFET to stay off for the same number of cycles (i.e.,

skipping pulses). The inductor current is not allowed to

reverse (discontinuous operation). This mode, like forced

continuous operation, exhibits low output ripple as well as

low audio noise and reduced RF interference as compared

to Burst Mode operation. It provides higher low current

efﬁ ciency than forced continuous mode, but not nearly as

high as Burst Mode operation.

Frequency Selection and Phase-Locked Loop

(FREQ and MODE/PLLIN Pins)

The selection of switching frequency is a trade-off between

efﬁ ciency and component size. Low frequency opera-

tion increases efﬁ ciency by reducing MOSFET switching

losses, but requires larger inductance and/or capacitance

to maintain low output ripple voltage. The switching

frequency of the LTC3865’s controllers can be selected

using the FREQ pin. If the MODE/PLLIN pin is not being

driven by an external clock source, the FREQ pin can be

used to program the controller’s operating frequency from

250kHz to 770kHz.

There is a precision 7.5µA current ﬂ ow out of FREQ pin

that user can program the controller’s switching frequency

with a single resistor to SGND. A curve is provided later in

the application section showing the relationship between

the voltage on the FREQ pin and switching frequency.

A phase-locked loop (PLL) is integrated on the LTC3865

to synchronize the internal oscillator to an external clock

source that is connected to the MODE/PLLIN pin. The

controller is operating in forced continuous mode when

it is synchronized.

The PLL loop ﬁ lter network is integrated inside the

LTC3865/LTC3865-1. The phase-locked loop is capable

of locking any frequency within the range of 250kHz to

770kHz. The frequency setting resistor should always be

present to set the controller’s initial switching frequency

before locking to the external clock.

Power Good (PGOOD Pins)

On the LTC3865 (UH32 package), the PGOOD pin is bonded

to the open drains of two individual internal N-channel

MOSFETs. When either V

OSENSE

voltage is not within ±10%

of the programmed voltage, the PGOOD pin is pulled low.

The PGOOD pin is also pulled low when either RUN pin

is below 1.22V or when the LTC3865 is in the soft-start

or tracking phase. The PGOOD pin will ﬂ ag power good

immediately when both V

OSENSE

are within the ±10%

of the programmed output voltage window. However,

there is an internal 20µs power bad mask when either

OSENSE

goes out the ±10% window. The internal power

OPERATION

LTC3865/LTC3865-1

3865fb

bad mask is 100µs when there are any VID transitions.

On the LTC3865-1 (UH32 package) or the LTC3865 (FE38

package), each channel has its own PGOOD pin. Therefore,

the PGOOD pins now only respond to their own channels.

The PGOOD pins are allowed to be pulled up by external

resistors to sources of up to 6V.

Output Overvoltage Protection

An overvoltage comparator, OV, guards against transient

overshoots (>10%) as well as other more serious condi-

tions that may overvoltage the output. In such cases,

the top MOSFET is turned off and the bottom MOSFET is

turned on until the reverse current limit for the overvoltage

condition is reached. The bottom MOSFET will be turned on

again at the next clock and be turned off when the reverse

current limit is reached again. This process repeats until

the overvoltage condition is cleared.

OPERATION

Output Voltage Programming

The output voltages of both channels of the LTC3865/

LTC3865-1 can be programmed to a preset value. There

are two VID pins for each channel and by connecting these

pins to INTV

, GND, or by ﬂ oating them, the output volt-

ages can be set to the values in Table 1.

Table 1. Programming of Output Voltage

VID11/VID21 VID12/VID22 V

OUT1

OUT2

(V)

INTV

5.0

INTV

Float 3.3

INTV

GND 2.5

Float INTV

1.8

Float Float 0.6 or External Divider

Float GND 1.5

GND INTV

1.2

GND Float 1.0

GND GND 1.1

The Typical Application on the ﬁ rst page is a basic LTC3865

application circuit. The LTC3865 can be conﬁ gured to use

either DCR (inductor resistance) sensing or low value resis-

tor sensing. The choice between the two current sensing

schemes is largely a design trade-off between cost, power

consumption and accuracy. DCR sensing is becoming

popular because it saves expensive current sensing resis-

tors and is more power efﬁ cient, especially in high current

applications. However, current sensing resistors provide

the most accurate current limits for the controller. Other

external component selection is driven by the load require-

ment, and begins with the selection of R

SENSE

(if R

SENSE

used) and inductor value. Next, the power MOSFETs are se-

lected. Finally, input and output capacitors are selected.

Current Limit Programming

The I

LIM

pin is a tri-level logic input which sets the maxi-

mum current limit of the controller. When I

LIM

is either

grounded, ﬂ oated or tied to INTV

, the typical value for

the maximum current sense threshold will be 30mV, 50mV

or 75mV, respectively.

APPLICATIONS INFORMATION

Which setting should be used? For the best current limit

accuracy, use the 75mV setting. The 30mV setting will

allow for the use of very low DCR inductors or sense

resistors, but at the expense of current limit accuracy.

The 50mV setting is a good balance between the two. For

single output dual phase applications, use the 50mV or

75mV setting for optimal current sharing.

SENSE

and SENSE

–

Pins

The SENSE

and SENSE

–

pins are the inputs to the current

comparators. The common mode input voltage range of

the current comparators is 0V to 5V. Both SENSE pins

are high impedance inputs with small base currents of

less than 1µA. When the SENSE pins ramp up from 0V to

1.4V, the small base currents ﬂ ow out of the SENSE pins.

When the SENSE pins ramp down from 5V to 1.1V, the

small base currents ﬂ ow into the SENSE pins. The high

impedance inputs to the current comparators allow ac-

curate DCR sensing. However, care must be taken not to

ﬂ oat these pins during normal operation.

LTC3865/LTC3865-1

3865fb

APPLICATIONS INFORMATION

Filter components mutual to the sense lines should be

placed close to the LTC3865/LTC3865-1, and the sense

lines should run close together to a Kelvin connection

underneath the current sense element (shown in Figure 1).

Sensing current elsewhere can effectively add parasitic

inductance and capacitance to the current sense element,

degrading the information at the sense terminals and mak-

ing the programmed current limit unpredictable. If DCR

sensing is used (Figure 2b), sense resistor R1 should be

placed close to the switching node, to prevent noise from

coupling into sensitive small-signal nodes. The capacitor

C1 should be placed close to the IC pins.

OUT

TO SENSE FILTER,

NEXT TO THE CONTROLLER

INDUCTOR OR R

SENSE

3865 F01

Figure 1. Sense Lines Placement with Inductor or Sense Resistor

For previous generation current mode controllers, the

maximum sense voltage was high enough (e.g., 75mV for

the LTC1628 / LTC3728 family) that the voltage drop across

the parasitic inductance of the sense resistor represented

a relatively small error. For today’s highest current density

solutions, however, the value of the sense resistor can be

less than 1mΩ and the peak sense voltage can be as low

as 20mV. In addition, inductor ripple currents greater than

50% with operation up to 1MHz are becoming more com-

mon. Under these conditions the voltage drop across the

sense resistor’s parasitic inductance is no longer negligible.

A typical sensing circuit using a discrete resistor is shown

in Figure 2a. In previous generations of controllers, a small

RC ﬁ lter placed near the IC was commonly used to reduce

the effects of capacitive and inductive noise coupled in

Low Value Resistors Current Sensing

A typical sensing circuit using a discrete resistor is shown

in Figure 2a. R

SENSE

is chosen based on the required

output current.

The current comparator has a maximum threshold

SENSE(MAX)

determined by the I

LIM

setting. The input

common mode range of the current comparator is 0V

to 5V. The current comparator threshold sets the peak of

the inductor current, yielding a maximum average output

current I

MAX

equal to the peak value less half the peak-to-

peak ripple current, ΔI

. To calculate the sense resistor

value, use the equation:

SENSE

SENSE MAX

MAX

()

Because of possible PCB noise in the current sensing loop,

the AC current sensing ripple of ΔV

SENSE

= ΔI

• R

SENSE

also needs to be checked in the design to get a good

signal-to-noise ratio. In general, for a reasonably good

PCB layout, a 15mV ΔV

SENSE

voltage is recommended

as a conservative number to start with, either for R

SENSE

or DCR sensing applications.

INTV

BOOST

PGND

FILTER COMPONENTS

PLACED NEAR SENSE PINS

SENSE

–

SGND

LTC3865

OUT

3865 F02a

• 2

≤ ESL/R

POLE-ZERO

CANCELLATION

SENSE RESISTOR

PLUS PARASITIC

INDUCTANCE

ESL

INTV

BOOST

PGND

*PLACE C1 NEAR SENSE

SENSE

–

PINS

INDUCTOR

DCRL

SENSE

–

SGND

LTC3865

OUT

3865 F02b

R2C1*

R2 • C1 =

DCR

SENSE(EQ)

= DCR

R1 + R2

(2a) Using a Resistor to Sense Current

(2b) Using the Inductor DCR to Sense Current

Figure 2. Two Different Methods of Sensing Current

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LTC3865EUH-1#TRPBF

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Switching Voltage Regulators Dual, 2-Phase Synchronous DC/DC Controller with Pin Selectable Outputs

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