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74LVT640D,118

P1-P3P4-P6P7-P9P10-P12P13-P15
74LVT640
3.3 V Octal transceiver with direction pin; inverting; 3-state
Rev. 3 — 10 April 2017 Product data sheet
1 General description
The 74LVT640 is a high-performance BiCMOS product designed for V
CC
operation
at 3.3 V.
This device is an octal transceiver featuring inverting 3-state bus compatible outputs in
both send and receive directions. The control function implementation minimizes external
timing requirements. The device features an output enable (OE) input for easy cascading
and a direction (DIR) input for direction control.
2 Features and benefits
• 3-state buffers
• Octal bidirectional bus interface
• Input and output interface capability to systems at 5 V supply
• TTL input and output switching levels
• Output capability: +64 mA and -32 mA
• Bus-hold data inputs eliminate the need for external pull-up resistors for unused inputs
• Live insertion/extraction permitted
• Power-up 3-state
• No bus current loading when output is tied to 5 V bus
• Latch-up protection:
– JESD78: exceeds 500 mA
• ESD protection:
– MIL STD 883 method 3015: exceeds 2000 V
– MM JESD22-A115-A exceeds 200 V
Nexperia
74LVT640
3.3 V Octal transceiver with direction pin; inverting; 3-state
74LVT640 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved.
Product data sheet Rev. 3 — 10 April 2017
2 / 15
3 Ordering information
Table 1. Ordering information
PackageType number
Temperature
range
Name Description Version
74LVT640D -40 °C to +85 °C SO20 plastic small outline package; 20 leads;
body width 7.5 mm
SOT163-1
74LVT640DB -40 °C to +85 °C SSOP20 plastic shrink small outline package; 20 leads;
body width 5.3 mm
SOT339-1
74LVT640PW -40 °C to +85 °C TSSOP20 plastic thin shrink small outline package; 20 leads;
body width 4.4 mm
SOT360-1
4 Functional diagram
aaa-026616
DIR
A0
OE
B0
1
2
19
18
A1
B1
3
17
A2
B2
4
16
A3
B3
5
15
A4
B4
6
14
A5
B5
7
13
A6
B6
8
12
A7
B7
9
11
Figure 1. Logic symbol
aaa-026617
19
G3
1
3EN1 (BA)
3EN2 (AB)
2
3
4
5
6
7
8
9
1
2
18
17
16
15
14
13
12
11
Figure 2. IEC logic symbol
Nexperia
74LVT640
3.3 V Octal transceiver with direction pin; inverting; 3-state
74LVT640 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved.
Product data sheet Rev. 3 — 10 April 2017
3 / 15
5 Pinning information
5.1 Pinning
74LVT640
DIR V
CC
A0 OE
A1 B0
A2 B1
A3 B2
A4 B3
A5 B4
A6 B5
A7 B6
GND
aaa-026618
1
2
3
4
5
6
7
8
9
10
B7
12
11
14
13
16
15
18
17
20
19
Figure 3. Pin configuration for SO20
74LVT640
DIR V
CC
A0 OE
A1 B0
A2 B1
A3 B2
A4 B3
A5 B4
A6 B5
A7 B6
GND B7
aaa-026619
1
2
3
4
5
6
7
8
9
10
12
11
14
13
16
15
18
17
20
19
Figure 4. Pin configuration for (T)SSOP20
5.2 Pin description
Table 2. Pin description
Symbol Pin Description
DIR 1 direction control input
A0, A1, A2, A3, A4, A5, A6, A7 2, 3, 4, 5, 6, 7, 8, 9 data inputs/outputs
GND 10 ground (0 V)
B0, B1, B2, B3, B4, B5, B6, B7 18, 17, 16, 15, 14, 13, 12, 11 data inputs/outputs
OE 19 output enable input (active LOW)
V
CC
20 supply voltage
6 Functional description
Table 3. Function selection
[1]
Inputs Inputs/outputs
OE DIR An Bn
L L Bn inputs
L H inputs An
H X Z Z
[1] H = HIGH voltage level;
L = LOW voltage level;
X = don’t care;
Z = high impedance OFF-state.
P1-P3P4-P6P7-P9P10-P12P13-P15

74LVT640D,118

Mfr. #:
Buy 74LVT640D,118
Manufacturer:
Nexperia
Description:
Bus Transceivers 3.3V OCTAL BUS XCVR
Lifecycle:
New from this manufacturer.
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